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authorNico Huber <nico.h@gmx.de>2019-05-04 16:59:20 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-05-07 15:55:50 +0000
commit66318aad07e6810065bc0668f4a1f34b7cb77687 (patch)
tree6b55edcdc8f54bf0d0f65365cd7ee0ccb5fe2884 /src/soc/intel/skylake/include
parent99e836c843e6a8536348d5cc9581b5a17512a263 (diff)
downloadcoreboot-66318aad07e6810065bc0668f4a1f34b7cb77687.tar.xz
intel/fsp1_1: Move MRC cache pointers into `romstage_params`
These are part of a common concept and not SoC specific. Change-Id: I9cb218d7825bd06a138f7f5d9e2b68e86077a3ec Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32589 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Diffstat (limited to 'src/soc/intel/skylake/include')
-rw-r--r--src/soc/intel/skylake/include/soc/pei_data.h9
1 files changed, 0 insertions, 9 deletions
diff --git a/src/soc/intel/skylake/include/soc/pei_data.h b/src/soc/intel/skylake/include/soc/pei_data.h
index 7406a3322e..5ea2190b8e 100644
--- a/src/soc/intel/skylake/include/soc/pei_data.h
+++ b/src/soc/intel/skylake/include/soc/pei_data.h
@@ -80,16 +80,7 @@ struct pei_data {
uint8_t dqs_map[2][8];
uint16_t RcompResistor[3];
uint16_t RcompTarget[5];
- /* Data read from flash and passed into MRC */
- const void *saved_data;
- int saved_data_size;
- /* Disable use of saved data (can be set by mainboard) */
- int disable_saved_data;
-
- /* Data from MRC that should be saved to flash */
- void *data_to_save;
- int data_to_save_size;
int mem_cfg_id;
} __packed;