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| author | Duncan Laurie <dlaurie@chromium.org> | 2016-04-21 17:34:56 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2016-05-09 08:28:37 +0200 |
| commit | e09b5f2d4f5bca48b0e7b5d7058fc93ed007cdd8 (patch) | |
| tree | a1a7a9585140414af59ebcca945dad20bd9964f1 /src/soc/intel/skylake/include | |
| parent | d2ea674635def43f639af6343e7cd3905314563d (diff) | |
| download | coreboot-e09b5f2d4f5bca48b0e7b5d7058fc93ed007cdd8.tar.xz | |
soc/intel/skylake: Output more ME status information
Output a few more status bits from HFS/HFS2 and add
some interesting bits from HFS3.
BUG=chrome-os-partner:52662
BRANCH=glados
TEST=boot on chell and verify ME status output
Change-Id: I989b680f203678dbe28559e858faf8b4e0837481
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 8ea34ab019da3fff965102bcef5158ddcc154728
Original-Change-Id: Iff977c8d85b4d4dfa00b5b19bc29d11813a99b9f
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/340390
Original-Reviewed-by: Aaron Durbin <adurbin@google.com>
Reviewed-on: https://review.coreboot.org/14687
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Duncan Laurie <dlaurie@google.com>
Diffstat (limited to 'src/soc/intel/skylake/include')
| -rw-r--r-- | src/soc/intel/skylake/include/soc/me.h | 34 |
1 files changed, 23 insertions, 11 deletions
diff --git a/src/soc/intel/skylake/include/soc/me.h b/src/soc/intel/skylake/include/soc/me.h index de8a42876a..423e9d10cc 100644 --- a/src/soc/intel/skylake/include/soc/me.h +++ b/src/soc/intel/skylake/include/soc/me.h @@ -45,14 +45,8 @@ #define ME_HFS_MODE_OVER_JMPR 4 #define ME_HFS_MODE_OVER_MEI 5 #define ME_HFS_BIOS_DRAM_ACK 1 -#define ME_HFS_ACK_NO_DID 0 -#define ME_HFS_ACK_RESET 1 -#define ME_HFS_ACK_PWR_CYCLE 2 -#define ME_HFS_ACK_S3 3 -#define ME_HFS_ACK_S4 4 -#define ME_HFS_ACK_S5 5 -#define ME_HFS_ACK_GBL_RESET 6 -#define ME_HFS_ACK_CONTINUE 7 +#define ME_HFS_POWER_SOURCE_AC 1 +#define ME_HFS_POWER_SOURCE_DC 2 struct me_hfs { u32 working_state: 4; @@ -64,10 +58,14 @@ struct me_hfs { u32 update_in_progress: 1; u32 error_code: 4; u32 operation_mode: 4; - u32 reserved: 4; + u32 reset_count: 4; u32 boot_options_present: 1; - u32 ack_data: 3; - u32 bios_msg_ack: 4; + u32 reserved1: 1; + u32 bist_test_state: 1; + u32 bist_reset_request: 1; + u32 current_power_source: 2; + u32 d3_support_valid: 1; + u32 d0i3_support_valid: 1; } __attribute__ ((packed)); #define PCI_ME_HFSTS2 0x48 @@ -165,6 +163,20 @@ struct me_hfs2 { u32 progress_code: 4; } __attribute__ ((packed)); +#define PCI_ME_HFSTS3 0x60 +#define ME_HFS3_FW_SKU_CONSUMER 0x2 +#define ME_HFS3_FW_SKU_CORPORATE 0x3 + +struct me_hfs3 { + u32 reserved1: 4; + u32 fw_sku: 3; + u32 encrypt_key_check: 1; + u32 pch_config_change: 1; + u32 reserved2: 21; + u32 encrypt_key_override: 1; + u32 power_down_mitigation: 1; +} __attribute__ ((packed)); + void intel_me_status(void); #endif |