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authorMartin Roth <martinroth@google.com>2018-05-20 17:46:51 -0600
committerMartin Roth <martinroth@google.com>2018-05-22 02:54:24 +0000
commit9641a92b112c5759ccb956287e80ba4a4983611b (patch)
treeefe2c9f7aae0756afd26600cbb584afde6c25f31 /src/soc/intel/skylake/lockdown.c
parent8f25a6680e23663f4c88f7fe61a7a62e8fe284c4 (diff)
downloadcoreboot-9641a92b112c5759ccb956287e80ba4a4983611b.tar.xz
src: Remove non-ascii characters
Change-Id: Iedb78e24a286a51830c85724af0179995ed553be Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/26434 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/skylake/lockdown.c')
-rw-r--r--src/soc/intel/skylake/lockdown.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/skylake/lockdown.c b/src/soc/intel/skylake/lockdown.c
index 79f6f70987..1abe9cb884 100644
--- a/src/soc/intel/skylake/lockdown.c
+++ b/src/soc/intel/skylake/lockdown.c
@@ -57,8 +57,8 @@ static void dmi_lockdown_config(void)
* GCS.BBS: (Boot BIOS Strap) This field determines the destination
* of accesses to the BIOS memory range.
* Bits Description
- * “0b”: SPI
- * “1b”: LPC/eSPI
+ * "0b": SPI
+ * "1b": LPC/eSPI
*/
pcr_or8(PID_DMI, PCR_DMI_GCS, PCR_DMI_GCS_BILD);
}