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| author | Rizwan Qureshi <rizwan.qureshi@intel.com> | 2016-08-03 19:16:18 +0530 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-08-06 04:36:46 +0200 |
| commit | 5d4194978275c2e3acf09788f80887023ca9ffe8 (patch) | |
| tree | 22771dcc9ff6af2beaf643740607c306a799d8a2 /src/soc/intel/skylake/lpc.c | |
| parent | dfb373541b71e4a8a41d1b4b5407c47ca0d9b5bd (diff) | |
| download | coreboot-5d4194978275c2e3acf09788f80887023ca9ffe8.tar.xz | |
soc/intel/skylake: Add Kabylake device Ids
Adding kabylake device ids for chip inits.
Skylake and Kabylak do not differ much, the intention
is to support both SoCs in the same code base.
Change-Id: I9ff4c6ca08fe681798001ce81cca2c085ce32325
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-on: https://review.coreboot.org/16049
Tested-by: build bot (Jenkins)
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/soc/intel/skylake/lpc.c')
| -rw-r--r-- | src/soc/intel/skylake/lpc.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/lpc.c b/src/soc/intel/skylake/lpc.c index cebd836e9c..3b5ccfec20 100644 --- a/src/soc/intel/skylake/lpc.c +++ b/src/soc/intel/skylake/lpc.c @@ -317,6 +317,8 @@ static const unsigned short pci_device_ids[] = { PCH_SPT_LP_U_BASE, PCH_SPT_LP_U_PREMIUM, PCH_SPT_LP_Y_PREMIUM, + PCH_KBL_LP_U_PREMIUM, + PCH_KBL_LP_Y_PREMIUM, 0 }; |