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| author | Felix Singer <felixsinger@posteo.net> | 2020-10-12 19:51:02 +0000 |
|---|---|---|
| committer | Michael Niewöhner <foss@mniewoehner.de> | 2020-12-03 21:55:42 +0000 |
| commit | 424467c2a38303a697a3f6f1cb9cdc6e397e4b2b (patch) | |
| tree | ab1995c13a5ee6f6153e32a85320cfc740176aa1 /src/soc/intel/skylake/me.c | |
| parent | 20f5dcec63ade1108e8ebaa6a34665aa9273db99 (diff) | |
| download | coreboot-424467c2a38303a697a3f6f1cb9cdc6e397e4b2b.tar.xz | |
soc/intel/skylake: Add chipset devicetree
Set most of the devices to off to keep current behaviour.
Change-Id: Ic4dbd965c84c3679e42a181dea0e7e618c12fb97
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46314
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/soc/intel/skylake/me.c')
0 files changed, 0 insertions, 0 deletions