diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-06-30 10:39:24 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-07-12 11:52:52 +0000 |
| commit | a4fc7bef7ffab0ed5f2bcd2d9b439dc4e49bd016 (patch) | |
| tree | 4d636a1aa3c2b2c8569084d917e1a1bd5142fb00 /src/soc/intel/skylake/me.c | |
| parent | 34510c377e81e7c4a9985e5690b7358f9b0568fb (diff) | |
| download | coreboot-a4fc7bef7ffab0ed5f2bcd2d9b439dc4e49bd016.tar.xz | |
nb/i945/raminit: Correct C0DRAMW & C1DRAMW for 4 DIMMs
Change-Id: Ib1f999447b37a1524d589552ea2eec640c2a2c7e
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/18387
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/soc/intel/skylake/me.c')
0 files changed, 0 insertions, 0 deletions