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| author | Nico Huber <nico.h@gmx.de> | 2018-11-11 02:51:14 +0100 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2019-01-09 22:15:48 +0000 |
| commit | a96e66a76f21c41b0c15db8d9df1d721f4a8a9af (patch) | |
| tree | 6cc4301dec4b2ca50a7c0fb43f92c60706bc7e14 /src/soc/intel/skylake/me.c | |
| parent | 3910c4e4882876d70dfef08c6cc3946bc190d9ed (diff) | |
| download | coreboot-a96e66a76f21c41b0c15db8d9df1d721f4a8a9af.tar.xz | |
soc/intel: Clean mess around UART_DEBUG
Everything is wrong here, the Kconfig symbols are only the tip of the
iceberg. Based on Kconfig prompts the SoC code performed pad configu-
rations! I don't see why the person who configures coreboot should have
the board schematics at hand.
As a mitigation, we remove the prompts for UART_DEBUG, which is renamed
to INTEL_LPSS_UART_FOR_CONSOLE (because the former didn't really say
what it's about), and for UART_FOR_CONSOLE in case the former is selec-
ted.
Change-Id: Ibe2ed3cab0bb04bb23989c22da45299f088c758b
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/29573
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/soc/intel/skylake/me.c')
| -rw-r--r-- | src/soc/intel/skylake/me.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/me.c b/src/soc/intel/skylake/me.c index 64a94ab0f7..f67086b22e 100644 --- a/src/soc/intel/skylake/me.c +++ b/src/soc/intel/skylake/me.c @@ -239,7 +239,7 @@ static void print_me_version(void *unused) * Print ME version only if UART debugging is enabled. Else, it takes ~1 * second to talk to ME and get this information. */ - if (!IS_ENABLED(CONFIG_UART_DEBUG)) + if (!IS_ENABLED(CONFIG_CONSOLE_SERIAL)) return; hfs.data = me_read_config32(PCI_ME_HFSTS1); |