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authorSridhar Siricilla <sridhar.siricilla@intel.com>2019-08-31 11:38:33 +0530
committerPatrick Georgi <pgeorgi@google.com>2019-09-12 13:14:39 +0000
commitb9d075b0fc12c26316eaaca2de6bfa659f0cb6c1 (patch)
treebd2eb747d26da36f66cca594462d3ef4c8212ad0 /src/soc/intel/skylake/me.c
parentbc553e6a5beee3db02cfd27e3a5e410857e78897 (diff)
downloadcoreboot-b9d075b0fc12c26316eaaca2de6bfa659f0cb6c1.tar.xz
src/soc/intel/common/block/cse: Make hfsts1 common & add helper functions
Host FW status 1 (FWSTS1/HFSTS1) register definition is common across SoCs, hence move it to common. Also add below helper function, * wait_cse_sec_override_mode() - Polls ME status for "HECI_OP_MODE_SEC_OVERRIDE". It's a special CSE mode, the mode ensures CSE does not trigger any spi cycles to CSE region. * set_host_ready() - Clears reset state from host CSR. TEST=Verified CSE recover mode on CML RVP & Hatch board Change-Id: Id5c12b7abdb27c38af74ea6ee568b42ec74bcb3c Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35226 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Diffstat (limited to 'src/soc/intel/skylake/me.c')
-rw-r--r--src/soc/intel/skylake/me.c44
1 files changed, 22 insertions, 22 deletions
diff --git a/src/soc/intel/skylake/me.c b/src/soc/intel/skylake/me.c
index 9e17ef1e3d..5fc817fd50 100644
--- a/src/soc/intel/skylake/me.c
+++ b/src/soc/intel/skylake/me.c
@@ -229,7 +229,7 @@ static void print_me_version(void *unused)
struct fw_ver_resp resp;
size_t resp_size = sizeof(resp);
- union me_hfs hfs;
+ union me_hfsts1 hfs1;
/*
* Print ME version only if UART debugging is enabled. Else, it takes ~1
@@ -241,14 +241,14 @@ static void print_me_version(void *unused)
if (!is_cse_enabled())
return;
- hfs.data = me_read_config32(PCI_ME_HFSTS1);
+ hfs1.data = me_read_config32(PCI_ME_HFSTS1);
/*
* This command can be run only if:
* - Working state is normal and
* - Operation mode is normal.
*/
- if ((hfs.fields.working_state != ME_HFS_CWS_NORMAL) ||
- (hfs.fields.operation_mode != ME_HFS_MODE_NORMAL))
+ if ((hfs1.fields.working_state != ME_HFS_CWS_NORMAL) ||
+ (hfs1.fields.operation_mode != ME_HFS_MODE_NORMAL))
goto failed;
/*
@@ -282,7 +282,7 @@ BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_EXIT, print_me_version, NULL);
void intel_me_status(void)
{
- union me_hfs hfs;
+ union me_hfsts1 hfs1;
union me_hfs2 hfs2;
union me_hfs3 hfs3;
union me_hfs6 hfs6;
@@ -290,13 +290,13 @@ void intel_me_status(void)
if (!is_cse_enabled())
return;
- hfs.data = me_read_config32(PCI_ME_HFSTS1);
+ hfs1.data = me_read_config32(PCI_ME_HFSTS1);
hfs2.data = me_read_config32(PCI_ME_HFSTS2);
hfs3.data = me_read_config32(PCI_ME_HFSTS3);
hfs6.data = me_read_config32(PCI_ME_HFSTS6);
printk(BIOS_DEBUG, "ME: Host Firmware Status Register 1 : 0x%08X\n",
- hfs.data);
+ hfs1.data);
printk(BIOS_DEBUG, "ME: Host Firmware Status Register 2 : 0x%08X\n",
hfs2.data);
printk(BIOS_DEBUG, "ME: Host Firmware Status Register 3 : 0x%08X\n",
@@ -309,21 +309,21 @@ void intel_me_status(void)
hfs6.data);
/* Check Current States */
printk(BIOS_DEBUG, "ME: FW Partition Table : %s\n",
- hfs.fields.fpt_bad ? "BAD" : "OK");
+ hfs1.fields.fpt_bad ? "BAD" : "OK");
printk(BIOS_DEBUG, "ME: Bringup Loader Failure : %s\n",
- hfs.fields.ft_bup_ld_flr ? "YES" : "NO");
+ hfs1.fields.ft_bup_ld_flr ? "YES" : "NO");
printk(BIOS_DEBUG, "ME: Firmware Init Complete : %s\n",
- hfs.fields.fw_init_complete ? "YES" : "NO");
+ hfs1.fields.fw_init_complete ? "YES" : "NO");
printk(BIOS_DEBUG, "ME: Manufacturing Mode : %s\n",
- hfs.fields.mfg_mode ? "YES" : "NO");
+ hfs1.fields.mfg_mode ? "YES" : "NO");
printk(BIOS_DEBUG, "ME: Boot Options Present : %s\n",
- hfs.fields.boot_options_present ? "YES" : "NO");
+ hfs1.fields.boot_options_present ? "YES" : "NO");
printk(BIOS_DEBUG, "ME: Update In Progress : %s\n",
- hfs.fields.update_in_progress ? "YES" : "NO");
+ hfs1.fields.update_in_progress ? "YES" : "NO");
printk(BIOS_DEBUG, "ME: D3 Support : %s\n",
- hfs.fields.d3_support_valid ? "YES" : "NO");
+ hfs1.fields.d3_support_valid ? "YES" : "NO");
printk(BIOS_DEBUG, "ME: D0i3 Support : %s\n",
- hfs.fields.d0i3_support_valid ? "YES" : "NO");
+ hfs1.fields.d0i3_support_valid ? "YES" : "NO");
printk(BIOS_DEBUG, "ME: Low Power State Enabled : %s\n",
hfs2.fields.low_power_state ? "YES" : "NO");
printk(BIOS_DEBUG, "ME: CPU Replaced : %s\n",
@@ -331,13 +331,13 @@ void intel_me_status(void)
printk(BIOS_DEBUG, "ME: CPU Replacement Valid : %s\n",
hfs2.fields.cpu_replaced_valid ? "YES" : "NO");
printk(BIOS_DEBUG, "ME: Current Working State : %s\n",
- me_cws_values[hfs.fields.working_state]);
+ me_cws_values[hfs1.fields.working_state]);
printk(BIOS_DEBUG, "ME: Current Operation State : %s\n",
- me_opstate_values[hfs.fields.operation_state]);
+ me_opstate_values[hfs1.fields.operation_state]);
printk(BIOS_DEBUG, "ME: Current Operation Mode : %s\n",
- me_opmode_values[hfs.fields.operation_mode]);
+ me_opmode_values[hfs1.fields.operation_mode]);
printk(BIOS_DEBUG, "ME: Error Code : %s\n",
- me_error_values[hfs.fields.error_code]);
+ me_error_values[hfs1.fields.error_code]);
printk(BIOS_DEBUG, "ME: Progress Phase : %s\n",
me_progress_values[hfs2.fields.progress_code]);
printk(BIOS_DEBUG, "ME: Power Management Event : %s\n",
@@ -484,14 +484,14 @@ static int send_heci_reset_message(void)
int send_global_reset(void)
{
int status = -1;
- union me_hfs hfs;
+ union me_hfsts1 hfs1;
if (!is_cse_enabled())
goto ret;
/* Check ME operating mode */
- hfs.data = me_read_config32(PCI_ME_HFSTS1);
- if (hfs.fields.operation_mode)
+ hfs1.data = me_read_config32(PCI_ME_HFSTS1);
+ if (hfs1.fields.operation_mode)
goto ret;
/* ME should be in Normal Mode for this command */