diff options
author | Michael Niewöhner <foss@mniewoehner.de> | 2019-10-05 19:47:47 +0200 |
---|---|---|
committer | Nico Huber <nico.h@gmx.de> | 2019-10-26 15:39:40 +0000 |
commit | 0f91f79447b63b846fe0da770404bf18833f1306 (patch) | |
tree | bfce597f2a795a1194803afec57666e17dba3508 /src/soc/intel/skylake/memmap.c | |
parent | a9e07f94448650b3a9a27062775c642f8939464b (diff) | |
download | coreboot-0f91f79447b63b846fe0da770404bf18833f1306.tar.xz |
soc/intel/skylake: drop support for FSP 1.1
This drops support for FSP 1.1 in soc/intel/skylake, after all boards
have been migrated to FSP 2.0, which is backwards compatible.
Any moving of files happens in a follow-up commit to make review easier.
Change-Id: I0dd2eab0edfda0545ff94c3908b8574d5ad830bd
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35813
Reviewed-by: Michael Niewöhner
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/skylake/memmap.c')
-rw-r--r-- | src/soc/intel/skylake/memmap.c | 9 |
1 files changed, 1 insertions, 8 deletions
diff --git a/src/soc/intel/skylake/memmap.c b/src/soc/intel/skylake/memmap.c index 29f2517468..f2790efb35 100644 --- a/src/soc/intel/skylake/memmap.c +++ b/src/soc/intel/skylake/memmap.c @@ -84,12 +84,7 @@ static size_t get_prmrr_size(uintptr_t dram_base, const struct soc_intel_skylake_config *config) { uintptr_t prmrr_base = dram_base; - size_t prmrr_size; - - if (CONFIG(PLATFORM_USES_FSP1_1)) - prmrr_size = 1*MiB; - else - prmrr_size = config->PrmrrSize; + size_t prmrr_size = config->PrmrrSize; if (!prmrr_size) return 0; @@ -292,7 +287,6 @@ void *cbmem_top(void) return (void *)(uintptr_t)ebda_cfg.tolum_base; } -#if CONFIG(PLATFORM_USES_FSP2_0) void fill_postcar_frame(struct postcar_frame *pcf) { uintptr_t top_of_ram; @@ -311,4 +305,3 @@ void fill_postcar_frame(struct postcar_frame *pcf) /* Cache the TSEG region */ postcar_enable_tseg_cache(pcf); } -#endif |