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author | Aaron Durbin <adurbin@chromium.org> | 2016-05-03 17:26:35 -0500 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2016-05-06 16:46:29 +0200 |
commit | 463af337b0b4c4fd79c4f3b28fac976448e49ec9 (patch) | |
tree | 56cf45674db2ce41e010d9b2515dff3f989f15b6 /src/soc/intel/skylake/pcie.c | |
parent | 309b8571cf7ad3fae1930de1c2541f62c3d62655 (diff) | |
download | coreboot-463af337b0b4c4fd79c4f3b28fac976448e49ec9.tar.xz |
cpu/intel/haswell: convert to using common MP and SMM init
In order to reduce duplication of code use the common MP and SMM
initialization flow.
Change-Id: I80b5b94b62bdd001581eb56513a0d532fffb64e8
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/14596
Tested-by: build bot (Jenkins)
Reviewed-by: Duncan Laurie <dlaurie@google.com>
Diffstat (limited to 'src/soc/intel/skylake/pcie.c')
0 files changed, 0 insertions, 0 deletions