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| author | Aaron Durbin <adurbin@chromium.org> | 2015-12-16 17:11:27 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2016-02-04 17:43:49 +0100 |
| commit | 50c3ba24d4969aa33454325abe1a4a25ef4bcc94 (patch) | |
| tree | 1c1c73af435c25266cd09eada2c25fb99d29336a /src/soc/intel/skylake/pmc.c | |
| parent | 4121f9e555170bde6589b4e731f17f2149c3b401 (diff) | |
| download | coreboot-50c3ba24d4969aa33454325abe1a4a25ef4bcc94.tar.xz | |
intel/skylake: unconditionally set SPI controller BAR
The setting of the SPI controller BAR was conditional
on the nominal frequency being set. Therefore, that doesn't
mean the SPI BAR is set on all boots. Move the setting of
the BAR in the southbridge_bootblock_init() which is called
prioer to cpu_bootblock_init().
BUG=chrome-os-partner:44827
BRANCH=None
TEST=Confirmed spibar is always set on glados.
Change-Id: Ia58447d70f5e39a4336d4d08593f143332de833a
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 56fff7c25c2eb0ccd90e08f71c064b83c66640f8
Original-Change-Id: I1e0cff783f4b072b80589a3a84703a262b86be3a
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/319461
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/13587
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/intel/skylake/pmc.c')
0 files changed, 0 insertions, 0 deletions