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| author | Duncan Laurie <dlaurie@chromium.org> | 2016-10-25 19:58:27 -0700 |
|---|---|---|
| committer | Duncan Laurie <dlaurie@chromium.org> | 2016-10-27 16:30:54 +0200 |
| commit | 8d01902bb78e25c750f796ea2645d17672f4b9a3 (patch) | |
| tree | 891dd1f1624c91add97e26b32896e648794e2e24 /src/soc/intel/skylake/pmutil.c | |
| parent | f0ba2259b84c1f5083dab14925351ddf8b245e11 (diff) | |
| download | coreboot-8d01902bb78e25c750f796ea2645d17672f4b9a3.tar.xz | |
skylake: Add support for eSPI SMI events
Add the necessary infrastructure to support eSPI SMI events,
and a mainboard handler to pass control to the EC.
BUG=chrome-os-partner:58666
TEST=tested on eve board with eSPI enabled, verified that lid
close event from the EC during firmware will result in an SMI
and shut down the system.
Change-Id: I6367e233e070a8fca053a7bdd2534c0578d15d12
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/17134
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/skylake/pmutil.c')
| -rw-r--r-- | src/soc/intel/skylake/pmutil.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/pmutil.c b/src/soc/intel/skylake/pmutil.c index 7d83e9f240..203a430ffa 100644 --- a/src/soc/intel/skylake/pmutil.c +++ b/src/soc/intel/skylake/pmutil.c @@ -177,7 +177,8 @@ static u32 print_smi_status(u32 smi_sts) [20] = "PCI_EXP_SMI", [21] = "MONITOR", [26] = "SPI", - [27] = "GPIO_UNLOCK" + [27] = "GPIO_UNLOCK", + [28] = "ESPI_SMI", }; if (!smi_sts) |