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| author | Karthikeyan Ramasubramanian <kramasub@google.com> | 2020-09-03 12:02:27 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-09-08 05:32:24 +0000 |
| commit | 4d761db7e8aeeef139e8b1c306bd481c09be2685 (patch) | |
| tree | 99d193b6c73ccb9dfcbdc0ec779fba12a6e851a1 /src/soc/intel/skylake/pmutil.c | |
| parent | 9526c5dedaa6d4dac82dca1eb2def236f169b037 (diff) | |
| download | coreboot-4d761db7e8aeeef139e8b1c306bd481c09be2685.tar.xz | |
mb/google/dedede/var/drawcia: Configure I2C high and low time
Configure the I2C bus high and low time for all enabled I2C buses.
BUG=b:162232776
TEST=Measured the I2C bus frequency as 389 KHz, high time as 870 ns and
low time as 1580 ns.
Change-Id: I67d2725a7fc8d83e3fa8a56cfa86540c4e6f0971
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45084
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/skylake/pmutil.c')
0 files changed, 0 insertions, 0 deletions