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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-07-13 22:16:25 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-07-18 15:25:35 +0000 |
| commit | 8950cfb66f8f1fd4b047fbef2347134be0aeacec (patch) | |
| tree | 57943bfb4f8d74c2d1a4bfbd2a9813ac27e510dd /src/soc/intel/skylake/romstage/romstage.c | |
| parent | 4af4e7f06eddad71f86eda3e401967e79d3a9ddb (diff) | |
| download | coreboot-8950cfb66f8f1fd4b047fbef2347134be0aeacec.tar.xz | |
soc/intel: Use config_of()
Change-Id: I0727a6b327410197cf32f598d1312737744386b3
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34328
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: David Guckian
Diffstat (limited to 'src/soc/intel/skylake/romstage/romstage.c')
| -rw-r--r-- | src/soc/intel/skylake/romstage/romstage.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c index 2bbab475af..2d0de2f5e9 100644 --- a/src/soc/intel/skylake/romstage/romstage.c +++ b/src/soc/intel/skylake/romstage/romstage.c @@ -39,26 +39,26 @@ /* SOC initialization before RAM is enabled */ void soc_pre_ram_init(struct romstage_params *params) { + const struct soc_intel_skylake_config *config; + /* Program MCHBAR and DMIBAR */ systemagent_early_init(); - const struct device *const dev = pcidev_path_on_root(PCH_DEVFN_LPC); - const struct soc_intel_skylake_config *const config = - dev ? dev->chip_info : NULL; + config = config_of_path(PCH_DEVFN_LPC); + /* Force a full memory train if RMT is enabled */ - params->disable_saved_data = config && config->Rmt; + params->disable_saved_data = config->Rmt; } /* UPD parameters to be initialized before MemoryInit */ void soc_memory_init_params(struct romstage_params *params, MEMORY_INIT_UPD *upd) { - const struct device *dev; const struct soc_intel_skylake_config *config; /* Set the parameters for MemoryInit */ - dev = pcidev_on_root(PCH_DEV_SLOT_LPC, 0); - config = dev->chip_info; + + config = config_of_path(PCH_DEVFN_LPC); /* * Set IGD stolen size to 64MB. The FBC hardware for skylake does not |