diff options
| author | Naresh G Solanki <naresh.solanki@intel.com> | 2016-11-16 21:40:13 +0530 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-11-30 17:11:00 +0100 |
| commit | 09fa0391f55e7c854104ef09b6f0afee20f067a4 (patch) | |
| tree | e18fcddc7830793d18d30f4441e71ff3e97e72aa /src/soc/intel/skylake/romstage/romstage_fsp20.c | |
| parent | a5b10417e41267e34126b806ae7653c488217ad5 (diff) | |
| download | coreboot-09fa0391f55e7c854104ef09b6f0afee20f067a4.tar.xz | |
vendorcode/skykabylake: Update header to fsp v1.4.0
Add header files as is from FSP build output without any adaptations.
Change-Id: Ic4b33c42efe8c9dbe9f9e2b11bf6344c9487d86e
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com>
Reviewed-on: https://review.coreboot.org/17556
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/skylake/romstage/romstage_fsp20.c')
0 files changed, 0 insertions, 0 deletions