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| author | Nico Huber <nico.h@gmx.de> | 2017-09-19 09:36:03 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-04-05 15:52:45 +0000 |
| commit | 2afe4dc075fd2cab8d362aa026066a5f53663f2c (patch) | |
| tree | b59930db3e2403c531697dbdccb87bdec1ee77e4 /src/soc/intel/skylake/romstage/romstage_fsp20.c | |
| parent | db06cf0576192dca4ae4cdb185d311baffc4669c (diff) | |
| download | coreboot-2afe4dc075fd2cab8d362aa026066a5f53663f2c.tar.xz | |
soc/intel/skylake: Enable VT-d and X2APIC
We use the usual static addresses 0xfed90000/0xfed91000 for the GFX
IOMMU and the general IOMMU respectively. These addresses have to be
configured in MCHBAR registers (maybe, who knows, the blob is undocu-
mented), advertised to FSP and reserved from the OS.
The new devicetree option `ignore_vtd` allows to retain the old beha-
viour (do whatever pre-set UPD values suggest).
We also let FSP set up distinct BDFs for messages originating from the
I/O-APIC and the HPET.
Change-Id: I77f87c385736615c127143760bbd144f97986b37
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/21597
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Youness Alaoui <snifikino@gmail.com>
Diffstat (limited to 'src/soc/intel/skylake/romstage/romstage_fsp20.c')
| -rw-r--r-- | src/soc/intel/skylake/romstage/romstage_fsp20.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage_fsp20.c index 98c78a582e..0b2d276a73 100644 --- a/src/soc/intel/skylake/romstage/romstage_fsp20.c +++ b/src/soc/intel/skylake/romstage/romstage_fsp20.c @@ -234,6 +234,13 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, m_cfg->PcieRpEnableMask = mask; cpu_flex_override(m_cfg); + + if (!config->ignore_vtd) { + m_cfg->PchHpetBdfValid = 1; + m_cfg->PchHpetBusNumber = 250; + m_cfg->PchHpetDeviceNumber = 15; + m_cfg->PchHpetFunctionNumber = 0; + } } void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) |