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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-07-12 13:10:19 +0300 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2019-07-21 18:58:01 +0000 |
| commit | 71756c21afd14f4114c597487406eb53e23730b2 (patch) | |
| tree | 7ccb61cf5eb3a5b3fb3024327fce58d141c4e928 /src/soc/intel/skylake/romstage/romstage_fsp20.c | |
| parent | 6046eb405a4f1cbb4df1ed0d23276f333bc0998b (diff) | |
| download | coreboot-71756c21afd14f4114c597487406eb53e23730b2.tar.xz | |
soc/intel: Expand SA_DEV_ROOT for ramstage
We do not want to disguise somewhat complex function
calls as simple macros.
Change-Id: I298f7f9a1c6a64cfba454e919eeaedc7bb2d4801
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34411
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/skylake/romstage/romstage_fsp20.c')
| -rw-r--r-- | src/soc/intel/skylake/romstage/romstage_fsp20.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage_fsp20.c index b15fa89292..bb86c6300d 100644 --- a/src/soc/intel/skylake/romstage/romstage_fsp20.c +++ b/src/soc/intel/skylake/romstage/romstage_fsp20.c @@ -223,7 +223,7 @@ static void soc_peg_init_params(FSP_M_CONFIG *m_cfg, * If PEG port is not defined in the device tree, it will be disabled * in FSP */ - dev = SA_DEV_PEG0; /* PEG 0:1:0 */ + dev = pcidev_on_root(SA_DEV_SLOT_PEG, 0); /* PEG 0:1:0 */ if (!dev || !dev->enabled) m_cfg->Peg0Enable = 0; else if (dev->enabled) { @@ -238,7 +238,7 @@ static void soc_peg_init_params(FSP_M_CONFIG *m_cfg, m_t_cfg->Peg0Gen3EqPh3Method = 0; } - dev = SA_DEV_PEG1; /* PEG 0:1:1 */ + dev = pcidev_on_root(SA_DEV_SLOT_PEG, 1); /* PEG 0:1:1 */ if (!dev || !dev->enabled) m_cfg->Peg1Enable = 0; else if (dev->enabled) { @@ -250,7 +250,7 @@ static void soc_peg_init_params(FSP_M_CONFIG *m_cfg, m_t_cfg->Peg1Gen3EqPh3Method = 0; } - dev = SA_DEV_PEG2; /* PEG 0:1:2 */ + dev = pcidev_on_root(SA_DEV_SLOT_PEG, 2); /* PEG 0:1:2 */ if (!dev || !dev->enabled) m_cfg->Peg2Enable = 0; else if (dev->enabled) { |