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| author | Balaji Manigandan B <balaji.manigandan@intel.com> | 2017-09-22 14:27:56 +0530 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-10-05 17:45:46 +0000 |
| commit | bd55c02a2398e2ce95cb06ff9f1e3fb1c20d0ab8 (patch) | |
| tree | 17496aca51e0b349ac9816ba9fb27102219cc1ea /src/soc/intel/skylake/romstage/romstage_fsp20.c | |
| parent | 53b8a82e72b74e7598c5344597e014cd5c6fb49e (diff) | |
| download | coreboot-bd55c02a2398e2ce95cb06ff9f1e3fb1c20d0ab8.tar.xz | |
vendor/intel/skykabylake: Update FSP header files to version 2.7.2
Update FSP header files to version 2.7.2.
New UPDs added
FspmUpd.h:
*CleanMemory
FspsUpd.h:
*IslVrCmd
*ThreeStrikeCounterDisable
Structure member names used to specify memory configuration
to MRC have been updated, SoC side romstage code is updated
to handle this change.
CQ-DEPEND=CL:*460573,CL:*460612,CL:*460592
BUG=b:65499724
BRANCH=None
TEST= Build and boot soraka, basic sanity check and suspend resume checks.
Change-Id: Ia4eca011bc9a3b1a50e49d6d86a09d05a0cbf151
Signed-off-by: Balaji Manigandan B <balaji.manigandan@intel.com>
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-on: https://review.coreboot.org/21679
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/skylake/romstage/romstage_fsp20.c')
| -rw-r--r-- | src/soc/intel/skylake/romstage/romstage_fsp20.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage_fsp20.c index c43bdc300c..cbf934e8bd 100644 --- a/src/soc/intel/skylake/romstage/romstage_fsp20.c +++ b/src/soc/intel/skylake/romstage/romstage_fsp20.c @@ -80,11 +80,11 @@ static void save_dimm_info(void) dimm_max = ARRAY_SIZE(mem_info->dimm); ctrlr_info = &memory_info_hob->Controller[0]; for (channel = 0; channel < MAX_CH && index < dimm_max; channel++) { - channel_info = &ctrlr_info->Channel[channel]; + channel_info = &ctrlr_info->ChannelInfo[channel]; if (channel_info->Status != 2) continue; for (dimm = 0; dimm < MAX_DIMM && index < dimm_max; dimm++) { - src_dimm = &channel_info->Dimm[dimm]; + src_dimm = &channel_info->DimmInfo[dimm]; dest_dimm = &mem_info->dimm[index]; if (src_dimm->Status != DIMM_PRESENT) @@ -93,8 +93,8 @@ static void save_dimm_info(void) /* Populate the DIMM information */ dimm_info_fill(dest_dimm, src_dimm->DimmCapacity, - memory_info_hob->DdrType, - memory_info_hob->Frequency, + memory_info_hob->MemoryType, + memory_info_hob->ConfiguredMemoryClockSpeed, channel_info->ChannelId, src_dimm->DimmId, (const char *)src_dimm->ModulePartNum, |