diff options
author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2019-09-02 09:35:21 +0200 |
---|---|---|
committer | Patrick Rudolph <siro@das-labor.org> | 2019-09-10 10:57:23 +0000 |
commit | 203061c24aba584edbd54dfe634ca1038c5e1ac1 (patch) | |
tree | 3a1ebfa2d88aa2564b09db43f2306226d527d25c /src/soc/intel/skylake/romstage/romstage_fsp20.c | |
parent | 0328a723b8d5d874e1528cda09a9e85d436a66f8 (diff) | |
download | coreboot-203061c24aba584edbd54dfe634ca1038c5e1ac1.tar.xz |
soc/intel/skylake: Add option to toggle Hyper-Threading
Tested on Supermicro X11SSH-TF.
Change-Id: I3ebab68ff868c78105bb4b35abffb92f3ccf1705
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35208
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc/intel/skylake/romstage/romstage_fsp20.c')
-rw-r--r-- | src/soc/intel/skylake/romstage/romstage_fsp20.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage_fsp20.c index 002a284408..deda53312c 100644 --- a/src/soc/intel/skylake/romstage/romstage_fsp20.c +++ b/src/soc/intel/skylake/romstage/romstage_fsp20.c @@ -252,6 +252,7 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, m_cfg->PchHpetDeviceNumber = V_P2SB_HBDF_DEV; m_cfg->PchHpetFunctionNumber = V_P2SB_HBDF_FUN; } + m_cfg->HyperThreading = CONFIG(FSP_HYPERTHREADING); } static void soc_primary_gfx_config_params(FSP_M_CONFIG *m_cfg, |