diff options
author | Nico Huber <nico.h@gmx.de> | 2017-09-19 09:36:03 +0200 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2018-04-05 15:52:45 +0000 |
commit | 2afe4dc075fd2cab8d362aa026066a5f53663f2c (patch) | |
tree | b59930db3e2403c531697dbdccb87bdec1ee77e4 /src/soc/intel/skylake/romstage/systemagent.c | |
parent | db06cf0576192dca4ae4cdb185d311baffc4669c (diff) | |
download | coreboot-2afe4dc075fd2cab8d362aa026066a5f53663f2c.tar.xz |
soc/intel/skylake: Enable VT-d and X2APIC
We use the usual static addresses 0xfed90000/0xfed91000 for the GFX
IOMMU and the general IOMMU respectively. These addresses have to be
configured in MCHBAR registers (maybe, who knows, the blob is undocu-
mented), advertised to FSP and reserved from the OS.
The new devicetree option `ignore_vtd` allows to retain the old beha-
viour (do whatever pre-set UPD values suggest).
We also let FSP set up distinct BDFs for messages originating from the
I/O-APIC and the HPET.
Change-Id: I77f87c385736615c127143760bbd144f97986b37
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/21597
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Youness Alaoui <snifikino@gmail.com>
Diffstat (limited to 'src/soc/intel/skylake/romstage/systemagent.c')
-rw-r--r-- | src/soc/intel/skylake/romstage/systemagent.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/romstage/systemagent.c b/src/soc/intel/skylake/romstage/systemagent.c index a262462a09..0c8e9e7b9e 100644 --- a/src/soc/intel/skylake/romstage/systemagent.c +++ b/src/soc/intel/skylake/romstage/systemagent.c @@ -18,8 +18,28 @@ #include <device/device.h> #include <intelblocks/systemagent.h> #include <soc/iomap.h> +#include <soc/pci_devs.h> #include <soc/romstage.h> #include <soc/systemagent.h> +#include "chip.h" + +static void systemagent_vtd_init(void) +{ + const struct device *const dev = dev_find_slot(0, SA_DEVFN_ROOT); + const struct soc_intel_skylake_config *config = NULL; + + if (dev) + config = dev->chip_info; + if (config && config->ignore_vtd) + return; + + const bool vtd_capable = + !(pci_read_config32(SA_DEV_ROOT, CAPID0_A) & VTD_DISABLE); + if (!vtd_capable) + return; + + sa_set_mch_bar(soc_vtd_resources, ARRAY_SIZE(soc_vtd_resources)); +} void systemagent_early_init(void) { @@ -40,6 +60,9 @@ void systemagent_early_init(void) /* Set Fixed MMIO address into MCH base address */ sa_set_mch_bar(soc_fixed_mch_resources, ARRAY_SIZE(soc_fixed_mch_resources)); + + systemagent_vtd_init(); + /* Enable PAM registers */ enable_pam_region(); } |