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authorFurquan Shaikh <furquan@chromium.org>2016-12-21 10:58:26 -0800
committerFurquan Shaikh <furquan@google.com>2016-12-23 04:54:35 +0100
commit42cfdf5184b3e94805958a3368f2e049c09119ac (patch)
treeed67de96fd6e25054aca74916acd5e36282c4388 /src/soc/intel/skylake/smihandler.c
parent45e11aa0a573aba1e4d8ae8dcd2cc87a8ca87dab (diff)
downloadcoreboot-42cfdf5184b3e94805958a3368f2e049c09119ac.tar.xz
soc/intel/skylake: Use the new SPI driver interface
1. Define controller for fast SPI. 2. Separate out functions that are specific to SPI and flash controller in different files. BUG=chrome-os-partner:59832 BRANCh=None TEST=Compiles successfully for chell and eve. Change-Id: I2fe0ef937297297339d4ea19dc37d3061caaa80c Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/17933 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/skylake/smihandler.c')
-rw-r--r--src/soc/intel/skylake/smihandler.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/smihandler.c b/src/soc/intel/skylake/smihandler.c
index 872cce1e15..382bdfc80f 100644
--- a/src/soc/intel/skylake/smihandler.c
+++ b/src/soc/intel/skylake/smihandler.c
@@ -26,6 +26,7 @@
#include <spi-generic.h>
#include <elog.h>
#include <pc80/mc146818rtc.h>
+#include <soc/flash_controller.h>
#include <soc/iomap.h>
#include <soc/lpc.h>
#include <soc/nvs.h>
@@ -276,7 +277,7 @@ static void finalize(void)
if (IS_ENABLED(CONFIG_SPI_FLASH_SMM))
/* Re-init SPI driver to handle locked BAR */
- spi_init();
+ spi_flash_init();
}
static void southbridge_smi_apmc(void)