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authorAamir Bohra <aamir.bohra@intel.com>2017-05-25 14:12:01 +0530
committerAaron Durbin <adurbin@chromium.org>2017-06-05 00:32:48 +0200
commit842776e1dcb310e889d2ba922be9d7b81a1c2dd0 (patch)
treec6276bf0cffe9c8cd436689665b1814757cb92f6 /src/soc/intel/skylake/tsc_freq.c
parent1fa16c9cb6c486cdd4b1bcb3734308b28b9c9a22 (diff)
downloadcoreboot-842776e1dcb310e889d2ba922be9d7b81a1c2dd0.tar.xz
soc/intel/skylake: Use Intel timer common code
Use timer code from soc/intel/common. This code removes monotonic timer refrence w.r.t MSR 24Mhz counter(0x637) and use tsc timer. Change-Id: I7fad620b11c9e5db128f646639c79ea58a0a574f Signed-off-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-on: https://review.coreboot.org/19912 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/skylake/tsc_freq.c')
-rw-r--r--src/soc/intel/skylake/tsc_freq.c28
1 files changed, 0 insertions, 28 deletions
diff --git a/src/soc/intel/skylake/tsc_freq.c b/src/soc/intel/skylake/tsc_freq.c
deleted file mode 100644
index 8a4ff461b2..0000000000
--- a/src/soc/intel/skylake/tsc_freq.c
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2014 Google Inc.
- * Copyright (C) 2015 Intel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <stdint.h>
-#include <cpu/x86/msr.h>
-#include <cpu/x86/tsc.h>
-#include <soc/msr.h>
-
-unsigned long tsc_freq_mhz(void)
-{
- msr_t platform_info;
-
- platform_info = rdmsr(MSR_PLATFORM_INFO);
- return CONFIG_CPU_BCLK_MHZ * ((platform_info.lo >> 8) & 0xff);
-}