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| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-10-13 23:04:19 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2019-11-10 22:41:33 +0000 |
| commit | 5efee3a2c28aa7e53074288733632fa06ac66046 (patch) | |
| tree | 2e8c18cb1d18cdbc9c833cf794caabac10e3ec1b /src/soc/intel/skylake/xhci.c | |
| parent | 95755dd65d18955e375345f06da7966f137e7d62 (diff) | |
| download | coreboot-5efee3a2c28aa7e53074288733632fa06ac66046.tar.xz | |
soc/intel/broadwell: Don't reinitialize SPI after lockdown
With the common southbridge SPI code reinitialization after lockdown
is not necessary, hence the SMM finalize call becomes a no-op.
Change-Id: I4d7c6ba91dc9f0e0ce4e3228fdf859d5f3d5abf4
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36004
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/skylake/xhci.c')
0 files changed, 0 insertions, 0 deletions