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authorSubrata Banik <subrata.banik@intel.com>2020-09-19 13:20:58 +0530
committerSubrata Banik <subrata.banik@intel.com>2020-09-21 16:03:16 +0000
commit77cc3267fc970c710299a164ecbc471f9287d719 (patch)
tree9e60471abf75ff30b740d055b97c8159fe78d75f /src/soc/intel/skylake
parente49ce2604fe93d4b2147fd82d86c3a9e629c336c (diff)
downloadcoreboot-77cc3267fc970c710299a164ecbc471f9287d719.tar.xz
soc/intel: Refactor do_global_reset() function
List of changes: 1. Rename do_global_reset() to force_global_reset() 2. Make force_global_reset() function static 3. Implement force_global_reset() into common/reset.c to avoid dedicated SoC implementation 4. Remove redundant force_global_reset() implementation from dedicated SoC 5. Make direct call to global_reset() from cse_lite.c 7. Drop CONFIG_HAVE_CF9_RESET_PREPARE Kconfig from APL SoC due to common reset (soc/intel/common/reset.c) code migration 8. Remove unused function send_global_reset() from SKL me.c due to common reset code migration 9. Delete heci.c from APL SoC as unused Signed-off-by: Subrata Banik <subrata.banik@intel.com> Change-Id: I1c5dc8d5606ef28ffaed4a64d90f470ae1ffc2a6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/45541 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/skylake')
-rw-r--r--src/soc/intel/skylake/include/soc/me.h1
-rw-r--r--src/soc/intel/skylake/me.c19
-rw-r--r--src/soc/intel/skylake/reset.c27
3 files changed, 0 insertions, 47 deletions
diff --git a/src/soc/intel/skylake/include/soc/me.h b/src/soc/intel/skylake/include/soc/me.h
index 5dbcefe386..50cc087138 100644
--- a/src/soc/intel/skylake/include/soc/me.h
+++ b/src/soc/intel/skylake/include/soc/me.h
@@ -178,6 +178,5 @@ union me_hfsts6 {
};
void intel_me_status(void);
-int send_global_reset(void);
#endif
diff --git a/src/soc/intel/skylake/me.c b/src/soc/intel/skylake/me.c
index b967d31940..493a42f459 100644
--- a/src/soc/intel/skylake/me.c
+++ b/src/soc/intel/skylake/me.c
@@ -339,25 +339,6 @@ void intel_me_status(void)
}
}
-int send_global_reset(void)
-{
- int status = -1;
- union me_hfsts1 hfs1;
-
- if (!is_cse_enabled())
- goto ret;
-
- /* Check ME operating mode */
- hfs1.data = me_read_config32(PCI_ME_HFSTS1);
- if (hfs1.fields.operation_mode)
- goto ret;
-
- /* ME should be in Normal Mode for this command */
- status = cse_request_global_reset();
-ret:
- return status;
-}
-
/*
* This can't be put in intel_me_status because by the time control
* reaches there, ME doesn't respond to GET_FW_VERSION command.
diff --git a/src/soc/intel/skylake/reset.c b/src/soc/intel/skylake/reset.c
index 1076ad2ffa..ecc052e6eb 100644
--- a/src/soc/intel/skylake/reset.c
+++ b/src/soc/intel/skylake/reset.c
@@ -1,35 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-#include <cf9_reset.h>
#include <console/console.h>
#include <fsp/util.h>
-#include <intelblocks/pmclib.h>
#include <soc/intel/common/reset.h>
-#include <soc/me.h>
-#include <soc/pm.h>
-
-static void do_force_global_reset(void)
-{
- /*
- * BIOS should ensure it does a global reset
- * to reset both host and Intel ME by setting
- * PCH PMC [B0:D31:F2 register offset 0xAC bit 20]
- */
- pmc_global_reset_enable(true);
-
- /* Now BIOS can write 0x06 or 0x0E to 0xCF9 port
- * to global reset platform */
- do_full_reset();
-}
-
-void do_global_reset(void)
-{
- if (!send_global_reset()) {
- /* If ME unable to reset platform then
- * force global reset using PMC CF9GR register*/
- do_force_global_reset();
- }
-}
void chipset_handle_reset(uint32_t status)
{