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authorSubrata Banik <subrata.banik@intel.com>2020-09-23 19:17:12 +0530
committerSubrata Banik <subrata.banik@intel.com>2020-09-27 03:03:06 +0000
commit8ff80b269d3e94c46d88c135f5f0e41e7c626905 (patch)
treed52d1bc999a7caff1abdf847876649526aaf36fa /src/soc/intel/skylake
parented6604d1f571f020471886172b896132406d0415 (diff)
downloadcoreboot-8ff80b269d3e94c46d88c135f5f0e41e7c626905.tar.xz
soc/intel/common/block/acpi: Factor out common gpio_op.asl
This patch moves gpio_op.asl into common block acpi directory to avoid duplicating the same ASL code block across SoC directory. TEST=Able to build and boot TGL, CNL and CML platform. 1) Dump and disassemble DSDT, verify all methods present inside common gpio_op.asl like GRXS, GTXS etc. are still there. 2) Verify no ACPI error seen while running 'dmesg` from console. Signed-off-by: Subrata Banik <subrata.banik@intel.com> Change-Id: I248f5e66994d2f3d6b0bd398347e7cf9ae7f2cc6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/45566 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/skylake')
-rw-r--r--src/soc/intel/skylake/acpi/gpio.asl62
1 files changed, 1 insertions, 61 deletions
diff --git a/src/soc/intel/skylake/acpi/gpio.asl b/src/soc/intel/skylake/acpi/gpio.asl
index 9877a77571..c1f559eb8d 100644
--- a/src/soc/intel/skylake/acpi/gpio.asl
+++ b/src/soc/intel/skylake/acpi/gpio.asl
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-#include <intelblocks/gpio_defs.h>
+#include <soc/intel/common/block/acpi/acpi/gpio_op.asl>
#include <soc/gpio.h>
Device (GPIO)
@@ -105,63 +105,3 @@ Method (GADD, 1, NotSerialized)
Add (Local2, PAD_CFG_BASE, Local2)
Return (Add (Local2, Multiply (Local1, 8)))
}
-
-/*
- * Get GPIO Rx Value
- * Arg0 - GPIO Number
- */
-Method (GRXS, 1, Serialized)
-{
- OperationRegion (PREG, SystemMemory, GADD (Arg0), 4)
- Field (PREG, AnyAcc, NoLock, Preserve)
- {
- VAL0, 32
- }
- Local0 = (PAD_CFG0_RX_STATE & VAL0) >> PAD_CFG0_RX_STATE_BIT
-
- Return (Local0)
-}
-
-/*
- * Get GPIO Tx Value
- * Arg0 - GPIO Number
- */
-Method (GTXS, 1, Serialized)
-{
- OperationRegion (PREG, SystemMemory, GADD (Arg0), 4)
- Field (PREG, AnyAcc, NoLock, Preserve)
- {
- VAL0, 32
- }
- Local0 = PAD_CFG0_TX_STATE & VAL0
-
- Return (Local0)
-}
-
-/*
- * Set GPIO Tx Value
- * Arg0 - GPIO Number
- */
-Method (STXS, 1, Serialized)
-{
- OperationRegion (PREG, SystemMemory, GADD (Arg0), 4)
- Field (PREG, AnyAcc, NoLock, Preserve)
- {
- VAL0, 32
- }
- VAL0 |= PAD_CFG0_TX_STATE
-}
-
-/*
- * Clear GPIO Tx Value
- * Arg0 - GPIO Number
- */
-Method (CTXS, 1, Serialized)
-{
- OperationRegion (PREG, SystemMemory, GADD (Arg0), 4)
- Field (PREG, AnyAcc, NoLock, Preserve)
- {
- VAL0, 32
- }
- VAL0 &= ~PAD_CFG0_TX_STATE
-}