src/soc: Fix various typos

These typos were found through manual review and grep.

Change-Id: I6693a9e3b51256b91342881a7116587f68ee96e6
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/23706
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>

6 files changed, 9 insertions, 9 deletions

diff --git a/src/soc/intel/skylake/include/soc/bootblock.h b/src/soc/intel/skylake/include/soc/bootblock.h
index 62dd234db4..59ce92a58d 100644
--- a/src/soc/intel/skylake/include/soc/bootblock.h
+++ b/src/soc/intel/skylake/include/soc/bootblock.h
@@ -24,12 +24,12 @@
 static inline void bootblock_fsp_temp_ram_init(void) {}
 #endif
 
-/* Bootblock pre console init programing */
+/* Bootblock pre console init programming */
 void bootblock_cpu_init(void);
 void bootblock_pch_early_init(void);
 void pch_uart_init(void);
 
-/* Bootblock post console init programing */
+/* Bootblock post console init programming */
 void i2c_early_init(void);
 void pch_early_init(void);
 void pch_early_iorange_init(void);
diff --git a/src/soc/intel/skylake/include/soc/vr_config.h b/src/soc/intel/skylake/include/soc/vr_config.h
index 66b4a01ad4..064ec3118f 100644
--- a/src/soc/intel/skylake/include/soc/vr_config.h
+++ b/src/soc/intel/skylake/include/soc/vr_config.h
@@ -33,7 +33,7 @@ struct vr_config {
 	 */
 	int vr_config_enable;
 
-	/* Power State X current cuttof in 1/4 Amp increments
+	/* Power State X current cutoff in 1/4 Amp increments
 	 * Range is 0-128A
 	 */
 	int psi1threshold;
diff --git a/src/soc/intel/skylake/irq.c b/src/soc/intel/skylake/irq.c
index d5778960c0..50119a5688 100644
--- a/src/soc/intel/skylake/irq.c
+++ b/src/soc/intel/skylake/irq.c
@@ -233,7 +233,7 @@ void soc_irq_settings(FSP_SIL_UPD *params)
 		sizeof(SI_PCH_DEVICE_INTERRUPT_CONFIG));
 
 	params->NumOfDevIntConfig = intdeventry;
-	/* PxRC to IRQ programing */
+	/* PxRC to IRQ programming */
 	for (i = 0; i < PCH_MAX_IRQ_CONFIG; i++) {
 		switch (i) {
 		case PCH_PARC:
diff --git a/src/soc/intel/skylake/memmap.c b/src/soc/intel/skylake/memmap.c
index c5dc8ac9af..9151d967eb 100644
--- a/src/soc/intel/skylake/memmap.c
+++ b/src/soc/intel/skylake/memmap.c
@@ -122,7 +122,7 @@ static size_t get_tracehub_size(uintptr_t dram_base,
 
 	/* GDXC MOT */
 	tracehub_base -= GDXC_MOT_MEMORY_SIZE;
-	/* Round down to natual boundary accroding to PSMI size */
+	/* Round down to natural boundary according to PSMI size */
 	tracehub_base = ALIGN_DOWN(tracehub_base, PSMI_BUFFER_AREA_SIZE);
 	/* GDXC IOT */
 	tracehub_base -= GDXC_IOT_MEMORY_SIZE;
diff --git a/src/soc/intel/skylake/romstage/systemagent.c b/src/soc/intel/skylake/romstage/systemagent.c
index 8f2fb337ed..a262462a09 100644
--- a/src/soc/intel/skylake/romstage/systemagent.c
+++ b/src/soc/intel/skylake/romstage/systemagent.c
@@ -34,12 +34,12 @@ void systemagent_early_init(void)
 		{ EDRAMBAR, EDRAM_BASE_ADDRESS, EDRAM_BASE_SIZE, "EDRAMBAR" },
 	};
 
-	/* Set Fixed MMIO addresss into PCI configuration space */
+	/* Set Fixed MMIO address into PCI configuration space */
 	sa_set_pci_bar(soc_fixed_pci_resources,
 			ARRAY_SIZE(soc_fixed_pci_resources));
-	/* Set Fixed MMIO addresss into MCH base address */
+	/* Set Fixed MMIO address into MCH base address */
 	sa_set_mch_bar(soc_fixed_mch_resources,
 			ARRAY_SIZE(soc_fixed_mch_resources));
-	/* Enable PAM regisers */
+	/* Enable PAM registers */
 	enable_pam_region();
 }
diff --git a/src/soc/intel/skylake/systemagent.c b/src/soc/intel/skylake/systemagent.c
index 8af995d133..3227519c3e 100644
--- a/src/soc/intel/skylake/systemagent.c
+++ b/src/soc/intel/skylake/systemagent.c
@@ -28,7 +28,7 @@
 /*
  * SoC implementation
  *
- * Add all known fixed memory ranges for Host Controller/Mmeory
+ * Add all known fixed memory ranges for Host Controller/Memory
  * controller.
  */
 void soc_add_fixed_mmio_resources(struct device *dev, int *index)