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| author | Angel Pons <th3fanbus@gmail.com> | 2020-09-25 10:20:11 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2020-09-26 11:42:28 +0000 |
| commit | a32df26ec0759bbac2080f6d9a437320f5d61157 (patch) | |
| tree | 8ed78db76ec9fb4236689db86f1884c4c7aacc47 /src/soc/intel/skylake | |
| parent | 2db779079585ed894189fad98a1a57b365e78d98 (diff) | |
| download | coreboot-a32df26ec0759bbac2080f6d9a437320f5d61157.tar.xz | |
arch/x86: Introduce `ARCH_ALL_STAGES_X86_32`
Nearly every x86 platform uses the same arch for all stages. The only
exception is Picasso. So, factor out redundant symbols from the rest.
Alder Lake is not yet complete, so it has been skipped for now.
Change-Id: I7cff9efbc44546807d9af089292c69fb0acc7bad
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45731
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/skylake')
| -rw-r--r-- | src/soc/intel/skylake/Kconfig | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index db0f6882ae..155df5878d 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -19,10 +19,7 @@ config CPU_SPECIFIC_OPTIONS def_bool y select ACPI_INTEL_HARDWARE_SLEEP_VALUES select ACPI_NHLT - select ARCH_BOOTBLOCK_X86_32 - select ARCH_RAMSTAGE_X86_32 - select ARCH_ROMSTAGE_X86_32 - select ARCH_VERSTAGE_X86_32 + select ARCH_ALL_STAGES_X86_32 select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH select BOOT_DEVICE_SUPPORTS_WRITES select CACHE_MRC_SETTINGS |