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authorFurquan Shaikh <furquan@google.com>2020-05-11 19:14:58 -0700
committerAaron Durbin <adurbin@chromium.org>2020-05-14 15:06:28 +0000
commitabd4714ee059b075be5cb94d332602a4ce454bc9 (patch)
tree25b2786f308040929ae3faead6c16b247e30d0df /src/soc/intel/skylake
parent1085fee761b381bbc2f9d18fb9cdc8a9e1c90884 (diff)
downloadcoreboot-abd4714ee059b075be5cb94d332602a4ce454bc9.tar.xz
soc/intel: Always advertise MMIO window above 4G in ACPI tables
There should be no harm in advertising the MMIO window above 4G in ACPI tables unconditionally. OS can decide whether or not to use the window. This change removes the config option enable_above_4GB_mmio and instead adds the correct MMIO window (above 4G) details to ACPI tables always. Change-Id: Ie728f6ee7f396918e61b29ade862b57dac36cb08 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41276 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/skylake')
-rw-r--r--src/soc/intel/skylake/acpi/globalnvs.asl5
-rw-r--r--src/soc/intel/skylake/include/soc/nvs.h7
2 files changed, 5 insertions, 7 deletions
diff --git a/src/soc/intel/skylake/acpi/globalnvs.asl b/src/soc/intel/skylake/acpi/globalnvs.asl
index 8eb0f8acd4..c2584db90b 100644
--- a/src/soc/intel/skylake/acpi/globalnvs.asl
+++ b/src/soc/intel/skylake/acpi/globalnvs.asl
@@ -55,9 +55,8 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
EPCS, 8, // 0x43 - SGX Enabled status
EMNA, 64, // 0x44 - 0x4B EPC base address
ELNG, 64, // 0x4C - 0x53 EPC Length
- E4GM, 8, // 0x54 - Enable above 4GB MMIO Resource
- A4GB, 64, // 0x55 - 0x5C Base of above 4GB MMIO Resource
- A4GS, 64, // 0x5D - 0x64 Length of above 4GB MMIO Resource
+ A4GB, 64, // 0x54 - 0x5B Base of above 4GB MMIO Resource
+ A4GS, 64, // 0x5C - 0x63 Length of above 4GB MMIO Resource
/* IGD OpRegion */
Offset (0xb4),
diff --git a/src/soc/intel/skylake/include/soc/nvs.h b/src/soc/intel/skylake/include/soc/nvs.h
index b4c669b169..630ceb7a78 100644
--- a/src/soc/intel/skylake/include/soc/nvs.h
+++ b/src/soc/intel/skylake/include/soc/nvs.h
@@ -45,10 +45,9 @@ typedef struct global_nvs_t {
u8 ecps; /* 0x43 - SGX Enabled status */
u64 emna; /* 0x44 - 0x4B EPC base address */
u64 elng; /* 0x4C - 0x53 EPC Length */
- u8 e4gm; /* 0x54 - Enable above 4GB MMIO Resource */
- u64 a4gb; /* 0x55 - 0x5C Base of above 4GB MMIO Resource */
- u64 a4gs; /* 0x5D - 0x64 Length of above 4GB MMIO Resource */
- u8 rsvd[79];
+ u64 a4gb; /* 0x54 - 0x5B Base of above 4GB MMIO Resource */
+ u64 a4gs; /* 0x5C - 0x63 Length of above 4GB MMIO Resource */
+ u8 rsvd[80];
/* IGD OpRegion */
u32 aslb; /* 0xb4 - IGD OpRegion Base Address */