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authorAaron Durbin <adurbin@chromium.org>2015-10-07 16:10:43 -0500
committerAaron Durbin <adurbin@gmail.com>2015-10-11 23:59:14 +0000
commitb66d6739c883473f5e0e16db426add29899a2577 (patch)
tree61df83eaa088bbea17748df76b4d651cd6b3e5ce /src/soc/intel/skylake
parentcfd7f51568edecbacf7a72ffc3d5cb281f2296ed (diff)
downloadcoreboot-b66d6739c883473f5e0e16db426add29899a2577.tar.xz
skylake: add support for verstage
The right files just need to be added to the verstage build. Do that so a stand alone verstage builds and links. BUG=chrome-os-partner:44827 BRANCH=None TEST=Built and booted glados. Change-Id: I2d0c98760494e2f4657ee35b6f155690939d2d18 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/11827 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/intel/skylake')
-rw-r--r--src/soc/intel/skylake/Makefile.inc9
-rw-r--r--src/soc/intel/skylake/romstage/Makefile.inc9
2 files changed, 18 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc
index b80767bff3..682f90d023 100644
--- a/src/soc/intel/skylake/Makefile.inc
+++ b/src/soc/intel/skylake/Makefile.inc
@@ -8,6 +8,15 @@ subdirs-y += ../../../cpu/x86/mtrr
subdirs-y += ../../../cpu/x86/smm
subdirs-y += ../../../cpu/x86/tsc
+verstage-y += gpio.c
+verstage-y += memmap.c
+verstage-y += monotonic_timer.c
+verstage-y += pch.c
+verstage-y += pmutil.c
+verstage-y += pcr.c
+verstage-y += tsc_freq.c
+verstage-$(CONFIG_UART_DEBUG) += uart_debug.c
+
romstage-y += flash_controller.c
romstage-y += gpio.c
romstage-y += memmap.c
diff --git a/src/soc/intel/skylake/romstage/Makefile.inc b/src/soc/intel/skylake/romstage/Makefile.inc
index 68467b5ab0..00943bad38 100644
--- a/src/soc/intel/skylake/romstage/Makefile.inc
+++ b/src/soc/intel/skylake/romstage/Makefile.inc
@@ -1,3 +1,12 @@
+verstage-y += cpu.c
+verstage-y += pch.c
+verstage-y += report_platform.c
+verstage-y += romstage.c
+verstage-y += smbus.c
+verstage-y += spi.c
+verstage-y += systemagent.c
+verstage-y += uart.c
+
romstage-y += cpu.c
romstage-y += pch.c
romstage-y += power_state.c