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authorSathya Prakash M R <sathya.prakash.m.r@intel.com>2015-12-15 22:49:49 +0530
committerMartin Roth <martinroth@google.com>2016-01-19 02:43:04 +0100
commit1ed16593670ee5bf165a65ac4bc1fc9e996c4628 (patch)
tree1a055804d06e7dd4dd6f95df28395ff5efbe4ab0 /src/soc/intel/skylake
parente369010ab872aa4d90ef99af95a50cdd8353520e (diff)
downloadcoreboot-1ed16593670ee5bf165a65ac4bc1fc9e996c4628.tar.xz
intel/skylake: Add support for IV feedback loop capture blob
SSM4567 smart speaker needs Current and Voltage sensing to be captured and reported to the algorithm. This needs 4 CH capture blob. BUG=chrome-os-partner:48625 BRANCH=none TEST=Built and booted. Verified CBFS locates the blob. CQ-DEPEND=CL:*242635 Change-Id: Ie13622da9a9a8ce5930d32e52ddaf2e0d4862895 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 06f1a501dcb3fa6102eccdb3e24f9011b7869ab0 Original-Change-Id: I7b65b7582b619be53544ebbe4b3ea65398d32a34 Original-Signed-off-by: Sathya Prakash M R <sathya.prakash.m.r@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/319020 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/12995 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/intel/skylake')
-rw-r--r--src/soc/intel/skylake/nhlt/Makefile.inc5
-rw-r--r--src/soc/intel/skylake/nhlt/ssm4567.c23
2 files changed, 28 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/nhlt/Makefile.inc b/src/soc/intel/skylake/nhlt/Makefile.inc
index 201dad5328..aff182c50b 100644
--- a/src/soc/intel/skylake/nhlt/Makefile.inc
+++ b/src/soc/intel/skylake/nhlt/Makefile.inc
@@ -13,6 +13,7 @@ DMIC_4CH_48KHZ_32B = dmic-4ch-48khz-32b.bin
NAU88L25 = nau88l25-2ch-48khz-24b.bin
MAX98357_RENDER = max98357-render-2ch-48khz-24b.bin
SSM4567_RENDER = ssm4567-render-2ch-48khz-24b.bin
+SSM4567_CAPTURE = ssm4567-capture-4ch-48khz-32b.bin
cbfs-files-$(CONFIG_NHLT_DMIC_2CH) += $(DMIC_2CH_48KHZ_16B)
$(DMIC_2CH_48KHZ_16B)-file := $(NHLT_BLOB_PATH)/$(DMIC_2CH_48KHZ_16B)
@@ -41,3 +42,7 @@ $(MAX98357_RENDER)-type := raw
cbfs-files-$(CONFIG_NHLT_SSM4567) += $(SSM4567_RENDER)
$(SSM4567_RENDER)-file := $(NHLT_BLOB_PATH)/$(SSM4567_RENDER)
$(SSM4567_RENDER)-type := raw
+
+cbfs-files-$(CONFIG_NHLT_SSM4567) += $(SSM4567_CAPTURE)
+$(SSM4567_CAPTURE)-file := $(NHLT_BLOB_PATH)/$(SSM4567_CAPTURE)
+$(SSM4567_CAPTURE)-type := raw
diff --git a/src/soc/intel/skylake/nhlt/ssm4567.c b/src/soc/intel/skylake/nhlt/ssm4567.c
index f531e25a35..92482095ca 100644
--- a/src/soc/intel/skylake/nhlt/ssm4567.c
+++ b/src/soc/intel/skylake/nhlt/ssm4567.c
@@ -27,6 +27,18 @@ static const struct nhlt_format_config ssm4567_render_cfg[] = {
},
};
+/* Capture Blob used for IV feedback for Speaker Protection Algorithm */
+static const struct nhlt_format_config ssm4567_capture_cfg[] = {
+ /* 48 KHz 32-bits per sample. */
+ {
+ .num_channels = 4,
+ .sample_freq_khz = 48,
+ .container_bits_per_sample = 32,
+ .valid_bits_per_sample = 32,
+ .settings_file = "ssm4567-capture-4ch-48khz-32b.bin",
+ },
+};
+
int nhlt_soc_add_ssm4567(struct nhlt *nhlt, int hwlink)
{
struct nhlt_endpoint *endp;
@@ -42,6 +54,17 @@ int nhlt_soc_add_ssm4567(struct nhlt *nhlt, int hwlink)
ARRAY_SIZE(ssm4567_render_cfg)))
return -1;
+ /* Capture Endpoint for IV Feedback */
+ endp = nhlt_soc_add_endpoint(nhlt, hwlink, AUDIO_DEV_I2S,
+ NHLT_DIR_CAPTURE);
+
+ if (endp == NULL)
+ return -1;
+
+ if (nhlt_endpoint_add_formats(endp, ssm4567_capture_cfg,
+ ARRAY_SIZE(ssm4567_capture_cfg)))
+ return -1;
+
nhlt_next_instance(nhlt, NHLT_LINK_SSP);
return 0;