diff options
author | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-11-18 15:31:15 -0800 |
---|---|---|
committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-11-20 20:22:34 +0100 |
commit | 5ff2502151d55349cd8d9c565d3bf5b14f91afa5 (patch) | |
tree | 7333da9bf0a5630bd16cde9de4ed88c3cdc68f73 /src/soc/intel/skylake | |
parent | aa5f5b153f10e7cb49641bedafe9990774d75119 (diff) | |
download | coreboot-5ff2502151d55349cd8d9c565d3bf5b14f91afa5.tar.xz |
intel/skylake: Fix flash_controller.c compilation
Since this code is not currently being built by coreboot, it
failed compilation.
Change-Id: Ib8a0e1ebc76b7dca3dd785b09398b73abad46366
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/12466
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/soc/intel/skylake')
-rw-r--r-- | src/soc/intel/skylake/flash_controller.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/intel/skylake/flash_controller.c b/src/soc/intel/skylake/flash_controller.c index a68c1e9297..aca22a9cea 100644 --- a/src/soc/intel/skylake/flash_controller.c +++ b/src/soc/intel/skylake/flash_controller.c @@ -61,18 +61,18 @@ static int wait_for_completion(pch_spi_regs * const regs, int timeout_ms, stopwatch_init_msecs_expire(&sw, timeout_ms); - while (!(timeout = stopwatch_expired(&sw))) { + do { hsfs = spi_read_hsfs(regs); if ((hsfs & (HSFS_FDONE | HSFS_FCERR))) break; - } + } while (!(timeout = stopwatch_expired(&sw))); if (timeout) { addr = spi_read_faddr(regs); hsfc = spi_read_hsfc(regs); printk(BIOS_ERR, "%ld ms Transaction timeout between offset " - "0x%08x and 0x%08x (= 0x%08x + %zd) HSFC=%x HSFS=%x!\n", + "0x%08x and 0x%08zx (= 0x%08x + %zd) HSFC=%x HSFS=%x!\n", stopwatch_duration_msecs(&sw), addr, addr + len - 1, addr, len - 1, hsfc, hsfs); return 1; @@ -82,7 +82,7 @@ static int wait_for_completion(pch_spi_regs * const regs, int timeout_ms, addr = spi_read_faddr(regs); hsfc = spi_read_hsfc(regs); printk(BIOS_ERR, "Transaction error between offset 0x%08x and " - "0x%08x (= 0x%08x + %zd) HSFC=%x HSFS=%x!\n", + "0x%08zx (= 0x%08x + %zd) HSFC=%x HSFS=%x!\n", addr, addr + len - 1, addr, len - 1, hsfc, hsfs); return 1; |