diff options
author | Duncan Laurie <dlaurie@chromium.org> | 2016-04-21 17:34:56 -0700 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2016-05-09 08:28:37 +0200 |
commit | e09b5f2d4f5bca48b0e7b5d7058fc93ed007cdd8 (patch) | |
tree | a1a7a9585140414af59ebcca945dad20bd9964f1 /src/soc/intel/skylake | |
parent | d2ea674635def43f639af6343e7cd3905314563d (diff) | |
download | coreboot-e09b5f2d4f5bca48b0e7b5d7058fc93ed007cdd8.tar.xz |
soc/intel/skylake: Output more ME status information
Output a few more status bits from HFS/HFS2 and add
some interesting bits from HFS3.
BUG=chrome-os-partner:52662
BRANCH=glados
TEST=boot on chell and verify ME status output
Change-Id: I989b680f203678dbe28559e858faf8b4e0837481
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 8ea34ab019da3fff965102bcef5158ddcc154728
Original-Change-Id: Iff977c8d85b4d4dfa00b5b19bc29d11813a99b9f
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/340390
Original-Reviewed-by: Aaron Durbin <adurbin@google.com>
Reviewed-on: https://review.coreboot.org/14687
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Duncan Laurie <dlaurie@google.com>
Diffstat (limited to 'src/soc/intel/skylake')
-rw-r--r-- | src/soc/intel/skylake/include/soc/me.h | 34 | ||||
-rw-r--r-- | src/soc/intel/skylake/me_status.c | 49 |
2 files changed, 72 insertions, 11 deletions
diff --git a/src/soc/intel/skylake/include/soc/me.h b/src/soc/intel/skylake/include/soc/me.h index de8a42876a..423e9d10cc 100644 --- a/src/soc/intel/skylake/include/soc/me.h +++ b/src/soc/intel/skylake/include/soc/me.h @@ -45,14 +45,8 @@ #define ME_HFS_MODE_OVER_JMPR 4 #define ME_HFS_MODE_OVER_MEI 5 #define ME_HFS_BIOS_DRAM_ACK 1 -#define ME_HFS_ACK_NO_DID 0 -#define ME_HFS_ACK_RESET 1 -#define ME_HFS_ACK_PWR_CYCLE 2 -#define ME_HFS_ACK_S3 3 -#define ME_HFS_ACK_S4 4 -#define ME_HFS_ACK_S5 5 -#define ME_HFS_ACK_GBL_RESET 6 -#define ME_HFS_ACK_CONTINUE 7 +#define ME_HFS_POWER_SOURCE_AC 1 +#define ME_HFS_POWER_SOURCE_DC 2 struct me_hfs { u32 working_state: 4; @@ -64,10 +58,14 @@ struct me_hfs { u32 update_in_progress: 1; u32 error_code: 4; u32 operation_mode: 4; - u32 reserved: 4; + u32 reset_count: 4; u32 boot_options_present: 1; - u32 ack_data: 3; - u32 bios_msg_ack: 4; + u32 reserved1: 1; + u32 bist_test_state: 1; + u32 bist_reset_request: 1; + u32 current_power_source: 2; + u32 d3_support_valid: 1; + u32 d0i3_support_valid: 1; } __attribute__ ((packed)); #define PCI_ME_HFSTS2 0x48 @@ -165,6 +163,20 @@ struct me_hfs2 { u32 progress_code: 4; } __attribute__ ((packed)); +#define PCI_ME_HFSTS3 0x60 +#define ME_HFS3_FW_SKU_CONSUMER 0x2 +#define ME_HFS3_FW_SKU_CORPORATE 0x3 + +struct me_hfs3 { + u32 reserved1: 4; + u32 fw_sku: 3; + u32 encrypt_key_check: 1; + u32 pch_config_change: 1; + u32 reserved2: 21; + u32 encrypt_key_override: 1; + u32 power_down_mitigation: 1; +} __attribute__ ((packed)); + void intel_me_status(void); #endif diff --git a/src/soc/intel/skylake/me_status.c b/src/soc/intel/skylake/me_status.c index 7b3636c6f3..79d4dfb7d6 100644 --- a/src/soc/intel/skylake/me_status.c +++ b/src/soc/intel/skylake/me_status.c @@ -206,9 +206,11 @@ void intel_me_status(void) { struct me_hfs _hfs, *hfs = &_hfs; struct me_hfs2 _hfs2, *hfs2 = &_hfs2; + struct me_hfs3 _hfs3, *hfs3 = &_hfs3; me_read_dword_ptr(hfs, PCI_ME_HFSTS1); me_read_dword_ptr(hfs2, PCI_ME_HFSTS2); + me_read_dword_ptr(hfs3, PCI_ME_HFSTS3); /* Check Current States */ printk(BIOS_DEBUG, "ME: FW Partition Table : %s\n", @@ -223,6 +225,14 @@ void intel_me_status(void) hfs->boot_options_present ? "YES" : "NO"); printk(BIOS_DEBUG, "ME: Update In Progress : %s\n", hfs->update_in_progress ? "YES" : "NO"); + printk(BIOS_DEBUG, "ME: D3 Support : %s\n", + hfs->d3_support_valid ? "YES" : "NO"); + printk(BIOS_DEBUG, "ME: D0i3 Support : %s\n", + hfs->d0i3_support_valid ? "YES" : "NO"); + printk(BIOS_DEBUG, "ME: Low Power State Enabled : %s\n", + hfs2->low_power_state ? "YES" : "NO"); + printk(BIOS_DEBUG, "ME: Power Gated : %s\n", + hfs2->power_gating_ind ? "YES" : "NO"); printk(BIOS_DEBUG, "ME: CPU Replaced : %s\n", hfs2->cpu_replaced_sts ? "YES" : "NO"); printk(BIOS_DEBUG, "ME: CPU Replacement Valid : %s\n", @@ -272,4 +282,43 @@ void intel_me_status(void) hfs2->progress_code, hfs2->current_state); } printk(BIOS_DEBUG, "\n"); + + /* Power Down Mitigation Status */ + printk(BIOS_DEBUG, "ME: Power Down Mitigation : %s\n", + hfs3->power_down_mitigation ? "YES" : "NO"); + + if (hfs3->power_down_mitigation) { + printk(BIOS_INFO, "ME: PD Mitigation State : "); + if (hfs3->encrypt_key_override == 1 && + hfs3->encrypt_key_check == 0 && + hfs3->pch_config_change == 0) + printk(BIOS_INFO, "Normal Operation"); + else if (hfs3->encrypt_key_override == 1 && + hfs3->encrypt_key_check == 1 && + hfs3->pch_config_change == 0) + printk(BIOS_INFO, "Issue Detected and Recovered"); + else + printk(BIOS_INFO, "Issue Detected but not Recovered"); + printk(BIOS_INFO, "\n"); + + printk(BIOS_DEBUG, "ME: Encryption Key Override : %s\n", + hfs3->encrypt_key_override ? "Workaround Applied" : + "Unable to override"); + printk(BIOS_DEBUG, "ME: Encryption Key Check : %s\n", + hfs3->encrypt_key_check ? "FAIL" : "PASS"); + printk(BIOS_DEBUG, "ME: PCH Configuration Info : %s\n", + hfs3->pch_config_change ? "Changed" : "No Change"); + + printk(BIOS_DEBUG, "ME: Firmware SKU : "); + switch (hfs3->fw_sku) { + case ME_HFS3_FW_SKU_CONSUMER: + printk(BIOS_DEBUG, "Consumer\n"); + break; + case ME_HFS3_FW_SKU_CORPORATE: + printk(BIOS_DEBUG, "Corporate\n"); + break; + default: + printk(BIOS_DEBUG, "Unknown (0x%x)\n", hfs3->fw_sku); + } + } } |