diff options
| author | Robbie Zhang <robbie.zhang@intel.com> | 2017-02-14 15:12:17 -0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-02-17 17:46:05 +0100 |
| commit | 2b194d97411bd86303e0fec3a2edae2a718466bc (patch) | |
| tree | 0e9081f2884b388550dcfbee27b3ef2495a59e38 /src/soc/intel/skylake | |
| parent | d2f16cac749065e373b0558c850a8d9d2254c700 (diff) | |
| download | coreboot-2b194d97411bd86303e0fec3a2edae2a718466bc.tar.xz | |
intel/skylake: add function is_secondary_thread()
There are MSRs that are programmable per-core not per-thread, so add
a function to check whether current executing CPU is a primary core
or a "hyperthreaded"/secondary core. For instance when trying to
program Core PRMRR MSRs(per-core) with mp_init, cpu exception is thrown
from the secondary thread. This function was used to avoid that.
Potentially this function can be put to common code or arch/x86 or cpu/x86.
BUG=chrome-os-partner:62438
BRANCH=NONE
TEST=Tested on Eve, verified core PRMRR MSRs get programmed only on primary
thread avoiding exeception.
Change-Id: Ic9648351fadf912164a39206788859baf3e5c173
Signed-off-by: Robbie Zhang <robbie.zhang@intel.com>
Reviewed-on: https://review.coreboot.org/18366
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/skylake')
| -rw-r--r-- | src/soc/intel/skylake/cpu.c | 11 | ||||
| -rw-r--r-- | src/soc/intel/skylake/include/soc/cpu.h | 1 |
2 files changed, 12 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c index f92635da77..e9bb29f7a6 100644 --- a/src/soc/intel/skylake/cpu.c +++ b/src/soc/intel/skylake/cpu.c @@ -435,6 +435,17 @@ static int adjust_apic_id(int index, int apic_id) return index; } +/* Check whether the current CPU is the sibling hyperthread. */ +int is_secondary_thread(void) +{ + int apic_id; + apic_id = lapicid(); + + if (!ht_disabled && (apic_id & 1)) + return 1; + return 0; +} + static void per_cpu_smm_trigger(void) { /* Relocate the SMM handler. */ diff --git a/src/soc/intel/skylake/include/soc/cpu.h b/src/soc/intel/skylake/include/soc/cpu.h index 35a30819b2..33fb2f1b3a 100644 --- a/src/soc/intel/skylake/include/soc/cpu.h +++ b/src/soc/intel/skylake/include/soc/cpu.h @@ -67,5 +67,6 @@ int cpu_config_tdp_levels(void); u32 cpu_family_model(void); u32 cpu_stepping(void); int cpu_is_ult(void); +int is_secondary_thread(void); #endif |