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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2019-06-23 11:11:53 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-09-12 13:16:10 +0000 |
| commit | c27014b9dfdee65a26c7ea2d6dc6d0da7cfa218e (patch) | |
| tree | 5cde2af13a06e1e2c61711692462c20899eb33f1 /src/soc/intel/skylake | |
| parent | 3270ce03d62523c732fc4bd884316546543eda3c (diff) | |
| download | coreboot-c27014b9dfdee65a26c7ea2d6dc6d0da7cfa218e.tar.xz | |
src/{northbridge,soc}: Remove not used #include <elog.h>
Change-Id: I01e1e356936b85b186d9bd5f1c1e5e3a1157a30b
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33732
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: David Guckian
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/skylake')
| -rw-r--r-- | src/soc/intel/skylake/romstage/romstage.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c index 2d0de2f5e9..a8bbfb633d 100644 --- a/src/soc/intel/skylake/romstage/romstage.c +++ b/src/soc/intel/skylake/romstage/romstage.c @@ -21,7 +21,6 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_def.h> -#include <elog.h> #include <intelblocks/fast_spi.h> #include <intelblocks/pmclib.h> #include <soc/pci_devs.h> |