diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2017-09-15 11:01:17 -0600 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-09-20 23:53:23 +0000 |
| commit | 9fde0d780dd0abd24119ff6f7854b4b5939ce7d2 (patch) | |
| tree | 2a42e542b93e2dc73712182a634a9483f512cc1a /src/soc/intel/skylake | |
| parent | aa51cd5c12596b0b6d5f61eb1108091bf3a4fd3f (diff) | |
| download | coreboot-9fde0d780dd0abd24119ff6f7854b4b5939ce7d2.tar.xz | |
vboot: remove init_vbnv_cmos()
Instead of having each potential caller deal with the differences
of cmos_init() and init_vbnv_cmos() when VBOOT is enabled put the
correct logic within the callee, cmos_init(), for handling the
vbnv in CMOS. The internal __cmos_init() routine returns when the
CMOS area was cleared.
BUG=b:63054105
Change-Id: Ia124bcd61d3ac03e899a4ecf3645fc4b7a558f03
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/21549
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/skylake')
| -rw-r--r-- | src/soc/intel/skylake/pmc.c | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/src/soc/intel/skylake/pmc.c b/src/soc/intel/skylake/pmc.c index f3a2681dd5..df08937739 100644 --- a/src/soc/intel/skylake/pmc.c +++ b/src/soc/intel/skylake/pmc.c @@ -36,8 +36,6 @@ #include <cpu/x86/smm.h> #include <soc/pcr_ids.h> #include <soc/ramstage.h> -#include <vboot/vbnv.h> -#include <vboot/vbnv_layout.h> static const struct reg_script pch_pmc_misc_init_script[] = { /* SLP_S4=4s, SLP_S3=50ms, disable SLP_X stretching after SUS loss. */ @@ -124,10 +122,7 @@ static void pch_rtc_init(void) /* Ensure the date is set including century byte. */ cmos_check_update_date(); - if (IS_ENABLED(CONFIG_VBOOT_VBNV_CMOS)) - init_vbnv_cmos(rtc_failed); - else - cmos_init(rtc_failed); + cmos_init(rtc_failed); } static void pch_power_options(void) |