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author | Meera Ravindranath <meera.ravindranath@intel.com> | 2020-02-07 22:27:58 +0530 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2020-02-17 15:54:57 +0000 |
commit | b143e677ee8df130fec1456a47e30f3088139974 (patch) | |
tree | c78bb5eec507a961adac501f2e66dc951e2d3537 /src/soc/intel/skylake | |
parent | cdabc407cde7a7ccea46390b8ed0cfb7b95c826b (diff) | |
download | coreboot-b143e677ee8df130fec1456a47e30f3088139974.tar.xz |
src/soc/tigerlake: Accomodate JSP specific changes in iomap.h
Updating MCH, GSPI And I2C base addresses for JSP in iomap header.
BUG=None
BRANCH=None
TEST=Compilation for Jasper lake board is working
Change-Id: Ia8e88e02989fe80d7bd1f28942e005cb0d862fcb
Signed-off-by: Meera Ravindranath <meera.ravindranath@intel.com>
Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38754
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/skylake')
0 files changed, 0 insertions, 0 deletions