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| author | Angel Pons <th3fanbus@gmail.com> | 2020-08-03 12:17:22 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-08-04 21:43:35 +0000 |
| commit | 37799b34395254d02a68d00d6ab4a77ce6bc5341 (patch) | |
| tree | e35374006e493487ae4112d4abcf3518c67f4c5e /src/soc/intel/skylake | |
| parent | c05a3f86ab65491bc24e1da22d8b667259acee5a (diff) | |
| download | coreboot-37799b34395254d02a68d00d6ab4a77ce6bc5341.tar.xz | |
soc/intel/broadwell: Add RMRRs after all DRHDs
The VT-d architecture specification (Doc. D51397-011, Rev. 3.1) says:
BIOS implementations must report these remapping structure types in
numerical order. i.e., All remapping structures of type 0 (DRHD)
enumerated before remapping structures of type 1 (RMRR), and so forth.
So, update the corresponding code to adhere to the specification.
Change-Id: Ib5ef5e006e590d72bec52e057e9b72150e0e636f
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44111
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/soc/intel/skylake')
0 files changed, 0 insertions, 0 deletions