summaryrefslogtreecommitdiff
path: root/src/soc/intel/skylake
diff options
context:
space:
mode:
authorElyes HAOUAS <ehaouas@noos.fr>2018-06-12 22:06:09 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-06-14 09:30:24 +0000
commit68c851bcd702e7816cdb6e504f7386ec404ecf13 (patch)
tree4f54fa935d738ff5e6fc473ba37bfc03a8ecb2ef /src/soc/intel/skylake
parentc8a649c08f92d4d2255626da4e1cd7a6d71469e7 (diff)
downloadcoreboot-68c851bcd702e7816cdb6e504f7386ec404ecf13.tar.xz
src: Get rid of device_t
Use of device_t is deprecated. Change-Id: I6adc0429ae9ecc8f726d6167a6458d9333dc515f Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/27036 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/intel/skylake')
-rw-r--r--src/soc/intel/skylake/bootblock/pch.c2
-rw-r--r--src/soc/intel/skylake/bootblock/report_platform.c10
-rw-r--r--src/soc/intel/skylake/pmc.c6
-rw-r--r--src/soc/intel/skylake/pmutil.c8
4 files changed, 16 insertions, 10 deletions
diff --git a/src/soc/intel/skylake/bootblock/pch.c b/src/soc/intel/skylake/bootblock/pch.c
index 521a1b736a..ef61a60291 100644
--- a/src/soc/intel/skylake/bootblock/pch.c
+++ b/src/soc/intel/skylake/bootblock/pch.c
@@ -46,7 +46,7 @@
static void enable_p2sbbar(void)
{
- device_t dev = PCH_DEV_P2SB;
+ pci_devfn_t dev = PCH_DEV_P2SB;
/* Enable PCR Base address in PCH */
pci_write_config32(dev, PCI_BASE_ADDRESS_0, CONFIG_PCR_BASE_ADDRESS);
diff --git a/src/soc/intel/skylake/bootblock/report_platform.c b/src/soc/intel/skylake/bootblock/report_platform.c
index 7473c575c5..8fd6599fb1 100644
--- a/src/soc/intel/skylake/bootblock/report_platform.c
+++ b/src/soc/intel/skylake/bootblock/report_platform.c
@@ -104,12 +104,12 @@ static struct {
{ PCI_DEVICE_ID_INTEL_KBL_GT2_DT2P2, "Kabylake DT GT2" },
};
-static uint8_t get_dev_revision(device_t dev)
+static uint8_t get_dev_revision(pci_devfn_t dev)
{
return pci_read_config8(dev, PCI_REVISION_ID);
}
-static uint16_t get_dev_id(device_t dev)
+static uint16_t get_dev_id(pci_devfn_t dev)
{
return pci_read_config16(dev, PCI_DEVICE_ID);
}
@@ -171,7 +171,7 @@ static void report_cpu_info(void)
static void report_mch_info(void)
{
int i;
- device_t dev = SA_DEV_ROOT;
+ pci_devfn_t dev = SA_DEV_ROOT;
uint16_t mchid = get_dev_id(dev);
uint8_t mch_revision = get_dev_revision(dev);
const char *mch_type = "Unknown";
@@ -190,7 +190,7 @@ static void report_mch_info(void)
static void report_pch_info(void)
{
int i;
- device_t dev = PCH_DEV_LPC;
+ pci_devfn_t dev = PCH_DEV_LPC;
uint16_t lpcid = get_dev_id(dev);
const char *pch_type = "Unknown";
@@ -207,7 +207,7 @@ static void report_pch_info(void)
static void report_igd_info(void)
{
int i;
- device_t dev = SA_DEV_IGD;
+ pci_devfn_t dev = SA_DEV_IGD;
uint16_t igdid = get_dev_id(dev);
const char *igd_type = "Unknown";
diff --git a/src/soc/intel/skylake/pmc.c b/src/soc/intel/skylake/pmc.c
index ecdc6bb93b..a2623d953d 100644
--- a/src/soc/intel/skylake/pmc.c
+++ b/src/soc/intel/skylake/pmc.c
@@ -31,7 +31,11 @@ void pmc_set_disb(void)
{
/* Set the DISB after DRAM init */
u32 disb_val;
- device_t dev = PCH_DEV_PMC;
+#if defined(__SIMPLE_DEVICE__)
+ pci_devfn_t dev = PCH_DEV_PMC;
+#else
+ struct device *dev = PCH_DEV_PMC;
+#endif
disb_val = pci_read_config32(dev, GEN_PMCON_A);
disb_val |= DISB;
diff --git a/src/soc/intel/skylake/pmutil.c b/src/soc/intel/skylake/pmutil.c
index d05c812e73..2c399c7ade 100644
--- a/src/soc/intel/skylake/pmutil.c
+++ b/src/soc/intel/skylake/pmutil.c
@@ -19,8 +19,6 @@
* and the differences between PCH variants.
*/
-#define __SIMPLE_DEVICE__
-
#include <arch/acpi.h>
#include <arch/io.h>
#include <device/device.h>
@@ -232,7 +230,11 @@ int rtc_failure(void)
u8 reg8;
int rtc_failed;
/* PMC Controller Device 0x1F, Func 02 */
- device_t dev = PCH_DEV_PMC;
+#if defined(__SIMPLE_DEVICE__)
+ pci_devfn_t dev = PCH_DEV_PMC;
+#else
+ struct device *dev = PCH_DEV_PMC;
+#endif
reg8 = pci_read_config8(dev, GEN_PMCON_B);
rtc_failed = reg8 & RTC_BATTERY_DEAD;
if (rtc_failed) {