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authorFelix Singer <felixsinger@posteo.net>2020-07-29 21:00:00 +0200
committerMichael Niewöhner <c0d3z3r0@review.coreboot.org>2020-08-07 21:29:21 +0000
commitc787a246f963621f1b48577881ac86fe5a3c15c7 (patch)
treea5eea198871cd81171b842c32b9661d4c2617d80 /src/soc/intel/skylake
parent3de90d134494203556a81c47a6640ae101674114 (diff)
downloadcoreboot-c787a246f963621f1b48577881ac86fe5a3c15c7.tar.xz
soc/intel/skylake: Add SA thermal subsystem definitions to pci_devs.h
Change-Id: Ic83cfbe2a715db317d94c2b9c6cdd8c58a43612f Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44027 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner
Diffstat (limited to 'src/soc/intel/skylake')
-rw-r--r--src/soc/intel/skylake/include/soc/pci_devs.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/include/soc/pci_devs.h b/src/soc/intel/skylake/include/soc/pci_devs.h
index 60c5f3a5d2..75f1ead9bf 100644
--- a/src/soc/intel/skylake/include/soc/pci_devs.h
+++ b/src/soc/intel/skylake/include/soc/pci_devs.h
@@ -28,6 +28,10 @@
#define SA_DEVFN_IGD PCI_DEVFN(SA_DEV_SLOT_IGD, 0)
#define SA_DEV_IGD PCI_DEV(0, SA_DEV_SLOT_IGD, 0)
+#define SA_DEV_SLOT_TS 0x04
+#define SA_DEVFN_TS PCI_DEVFN(SA_DEV_SLOT_TS, 0)
+#define SA_DEV_TS PCI_DEV(0, SA_DEV_SLOT_TS, 0)
+
#define SA_DEV_SLOT_GMM 0x08
#define SA_DEVFN_GMM PCI_DEVFN(SA_DEV_SLOT_GMM, 0)
#define SA_DEV_GMM PCI_DEV(0, SA_DEV_SLOT_GMM, 0)