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authorVenkata Krishna Nimmagadda <venkata.krishna.nimmagadda@intel.com>2020-04-17 00:21:22 -0700
committerDuncan Laurie <dlaurie@chromium.org>2020-04-29 03:01:30 +0000
commitcd41fa378d03eb2509d5757c441f242bc3f98a6f (patch)
tree380985e545279a3b59e64541cefa25ba3e87144c /src/soc/intel/tigerlake/acpi/gpio.asl
parentf98bbda5fb145287c75e944b7c8d91e7c57a672e (diff)
downloadcoreboot-cd41fa378d03eb2509d5757c441f242bc3f98a6f.tar.xz
soc/intel/tigerlake: Add method to look up GPIO com ID for an index
This patch adds GPID, a helper method to look up GPIO community ID for an index. This patch also includes Intel's common GPIO ASL code. CGPM method in the common code uses the GPID method introduced in this patch. BUG=b:148892882 BRANCH=none TEST="BUILD volteer and ripto" Signed-off-by: Venkata Krishna Nimmagadda <venkata.krishna.nimmagadda@intel.com> Change-Id: Id6a00fb8adef0285d6bbc35cd5a44539bd3be6b8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/40478 Reviewed-by: Venkata Krishna Nimmagadda <Venkata.krishna.nimmagadda@intel.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/tigerlake/acpi/gpio.asl')
-rw-r--r--src/soc/intel/tigerlake/acpi/gpio.asl33
1 files changed, 33 insertions, 0 deletions
diff --git a/src/soc/intel/tigerlake/acpi/gpio.asl b/src/soc/intel/tigerlake/acpi/gpio.asl
index 2b4aff09c0..9b8a175659 100644
--- a/src/soc/intel/tigerlake/acpi/gpio.asl
+++ b/src/soc/intel/tigerlake/acpi/gpio.asl
@@ -4,6 +4,7 @@
#include <soc/irq.h>
#include <soc/pcr_ids.h>
#include <intelblocks/gpio.h>
+#include <soc/intel/common/acpi/gpio.asl>
#include "gpio_op.asl"
Device (GCM0)
@@ -142,3 +143,35 @@ Method (GADD, 1, NotSerialized)
Local2 = PCRB(Local0) + PAD_CFG_BASE + (Local1 * 16)
Return (Local2)
}
+
+/*
+ * Return PCR Port ID of GPIO Communities
+ *
+ * Arg0: GPIO Community (0-5)
+ */
+Method (GPID, 1, Serialized)
+{
+ Switch (ToInteger (Arg0))
+ {
+ Case (0) {
+ Local0 = PID_GPIOCOM0
+ }
+ Case (1) {
+ Local0 = PID_GPIOCOM1
+ }
+ Case (2) {
+ Local0 = PID_GPIOCOM2
+ }
+ Case (4) {
+ Local0 = PID_GPIOCOM4
+ }
+ Case (5) {
+ Local0 = PID_GPIOCOM5
+ }
+ Default {
+ Return (0)
+ }
+ }
+
+ Return (Local0)
+}