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authorAaron Durbin <adurbin@chromium.org>2020-04-11 11:58:57 -0600
committerPatrick Georgi <pgeorgi@google.com>2020-05-05 12:59:43 +0000
commit1d0b99ba1df910677b3ac238a16b88bcec2d49f8 (patch)
tree94ad3d1ce23a47f655a2f5cac32eebc64b4e1482 /src/soc/intel/tigerlake/acpi/pmc.asl
parent314c716aff9895221f1f5b8bef4d3889a7749c0a (diff)
downloadcoreboot-1d0b99ba1df910677b3ac238a16b88bcec2d49f8.tar.xz
soc/amd/picasso: add Kconfig option to disable rom sharing
Add a knob for mainboards to request disablement of the SPI flash ROM sharing in the chipset. The chipset allows the board to share the SPI flash bus and needs a pin to perform the request. If the board design does not employ SPI flash ROM sharing then it's imperative to ensure this option is selected, especially if the pin is being utilized by something else in the board design. BUG=b:153502861 Change-Id: I60ba852070dd218c4ac071b6c1cfcde2df8e5dce Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2146445 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Commit-Queue: Aaron Durbin <adurbin@google.com> Tested-by: Aaron Durbin <adurbin@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40869 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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