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author | Subrata Banik <subrata.banik@intel.com> | 2019-11-14 12:14:39 +0530 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-15 11:02:37 +0000 |
commit | 5d14c76f1ae62d0543614340f4b588adf4f506eb (patch) | |
tree | d74a0775bfae5d4a7ae774643795912bec7a354a /src/soc/intel/tigerlake/bootblock/pch.c | |
parent | 5885ffef326ff41b2bad80e42e1795a2982754b3 (diff) | |
download | coreboot-5d14c76f1ae62d0543614340f4b588adf4f506eb.tar.xz |
soc/intel/{icl,tgl}: Rename pch_early_init() to pch_init()
This patch renames pch_early_init() function as per review feedback
CB:36550
Change-Id: I9f638e738d1a910b688cc3e51795230b2e542f82
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36841
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Diffstat (limited to 'src/soc/intel/tigerlake/bootblock/pch.c')
-rw-r--r-- | src/soc/intel/tigerlake/bootblock/pch.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/tigerlake/bootblock/pch.c b/src/soc/intel/tigerlake/bootblock/pch.c index c7ccbf8bab..1ef4928fa6 100644 --- a/src/soc/intel/tigerlake/bootblock/pch.c +++ b/src/soc/intel/tigerlake/bootblock/pch.c @@ -156,7 +156,7 @@ void pch_early_iorange_init(void) pch_enable_lpc(); } -void pch_early_init(void) +void pch_init(void) { /* * Enabling ABASE for accessing PM1_STS, PM1_EN, PM1_CNT, |