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author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2020-05-14 14:36:25 -0600 |
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committer | Duncan Laurie <dlaurie@chromium.org> | 2020-05-28 23:53:58 +0000 |
commit | 90e683b3071030c7f0f56b6bd52dc3bb0d3d9578 (patch) | |
tree | 4680d4b78fd8cfdcfe53ebcf5737861313c6acbe /src/soc/intel/tigerlake/gpio.c | |
parent | 3c93b7e166bb2bcaf1bf17754194604452628c28 (diff) | |
download | coreboot-90e683b3071030c7f0f56b6bd52dc3bb0d3d9578.tar.xz |
mb/google/volteer: Add PMC.MUX.CONx devices to devicetree for Volteer
Volteer's MUX connections are known, and can now be described in ACPI
tables. Port 1 has the only oddity, with SBU lines staying fixed in the
CC1 orientation.
TEST=Dump SSDT tables on Volteer, and confirm (coalesced for brevity):
Scope (\_SB.PCI0.PMC)
{
Device (MUX)
{
Name (_HID, "INTC105C")
Device (CON0)
{
Name (_ADR, 0)
Name (_DSD, Package() {
Package () { "usb2-port-number", 9 },
Package () { "usb3-port-number", 1 },
})
}
Device (CON1)
{
Name (_ADR, 1)
Name (_DSD, Package() {
Package () { "usb2-port-number", 4 },
Package () { "usb3-port-number", 2 },
Package () { "sbu-orientation", "normal" },
...
}
}
}
Change-Id: Id361b2df07e87ad72b6a59a686977b3f424e8ecf
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41414
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/soc/intel/tigerlake/gpio.c')
0 files changed, 0 insertions, 0 deletions