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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-01-06 19:00:31 +0200 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-01-09 21:31:31 +0000 |
commit | 73451fdea266e24a3ce99e1bf41f49735dc62d28 (patch) | |
tree | 96b29d28afcfc25e7cedf4e410a56df049248ce4 /src/soc/intel/tigerlake/include | |
parent | 7cdcc38f292d7a8ffd285d17c848e60e41eec759 (diff) | |
download | coreboot-73451fdea266e24a3ce99e1bf41f49735dc62d28.tar.xz |
sb/intel/common: Add smbus_set_slave_addr()
Change-Id: I7dddb61fab00e0f4f67d4eebee0cfe8dcd99f4ab
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38230
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/tigerlake/include')
-rw-r--r-- | src/soc/intel/tigerlake/include/soc/smbus.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/soc/intel/tigerlake/include/soc/smbus.h b/src/soc/intel/tigerlake/include/soc/smbus.h index 9226fba4e1..50ea044e53 100644 --- a/src/soc/intel/tigerlake/include/soc/smbus.h +++ b/src/soc/intel/tigerlake/include/soc/smbus.h @@ -23,8 +23,6 @@ #define _SOC_TIGERLAKE_SMBUS_H_ /* IO and MMIO registers under primary BAR */ -/* Set address for PCH as SMBus slave role */ -#define SMB_RCV_SLVA 0x09 /* TCO registers and fields live behind TCOBASE I/O bar in SMBus device. */ #define TCO1_STS 0x04 |