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| author | David Wu <david_wu@quanta.corp-partner.google.com> | 2020-06-11 14:46:24 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-06-22 12:28:23 +0000 |
| commit | 63ce260a3ea8da00973d48af7c04a215e8163985 (patch) | |
| tree | c43c94391dd8883ac83f64c06c02a7ec5197cb79 /src/soc/intel/tigerlake/romstage/fsp_params.c | |
| parent | feecdc2c0bac3dd4ebc1e24b047b9374a4d9d25d (diff) | |
| download | coreboot-63ce260a3ea8da00973d48af7c04a215e8163985.tar.xz | |
soc/intel/tigerlake: Add CmdMirror option in chip.h
Provide CmdMirror option in chip.h so that it can control CmdMirror FSP
UPD via dev tree.
BUG=b:156435028
BRANCH=none
TEST=FW_NAME=terrador emerge-volteer coreboot chromeos-bootimage
Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com>
Change-Id: Idae9fa439f077f8f3fb16fe74c2f263c008cd5f4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42276
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/tigerlake/romstage/fsp_params.c')
| -rw-r--r-- | src/soc/intel/tigerlake/romstage/fsp_params.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/tigerlake/romstage/fsp_params.c b/src/soc/intel/tigerlake/romstage/fsp_params.c index f7956c80be..1a46b7a86d 100644 --- a/src/soc/intel/tigerlake/romstage/fsp_params.c +++ b/src/soc/intel/tigerlake/romstage/fsp_params.c @@ -196,6 +196,9 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, /* Change VmxEnable UPD value according to ENABLE_VMX Kconfig */ m_cfg->VmxEnable = CONFIG(ENABLE_VMX); + + /* Command Pins Mirrored */ + m_cfg->CmdMirror[0] = config->CmdMirror; } void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) |