diff options
| author | Nico Huber <nico.h@gmx.de> | 2020-04-26 19:24:00 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2020-05-27 21:34:58 +0000 |
| commit | 826094f65cf8778bd120e08917ef5557d0bad49d (patch) | |
| tree | 739210a720f37af2af8154e21ffb778801f238e9 /src/soc/intel/tigerlake | |
| parent | f2a0be235cdf72caff549a1cfe0b986bdd99e93b (diff) | |
| download | coreboot-826094f65cf8778bd120e08917ef5557d0bad49d.tar.xz | |
soc/intel/gma: Move display and opregion init to common code
Change-Id: I359b529df44db7d63c5a7922cb1ebd8e130d0c43
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40725
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/tigerlake')
| -rw-r--r-- | src/soc/intel/tigerlake/graphics.c | 30 |
1 files changed, 0 insertions, 30 deletions
diff --git a/src/soc/intel/tigerlake/graphics.c b/src/soc/intel/tigerlake/graphics.c index ea90d44033..11aea72211 100644 --- a/src/soc/intel/tigerlake/graphics.c +++ b/src/soc/intel/tigerlake/graphics.c @@ -6,12 +6,7 @@ * Chapter number: 4 */ -#include <console/console.h> #include <fsp/util.h> -#include <device/device.h> -#include <device/pci.h> -#include <device/pci_ops.h> -#include <drivers/intel/gma/opregion.h> #include <intelblocks/graphics.h> #include <types.h> @@ -19,28 +14,3 @@ uintptr_t fsp_soc_get_igd_bar(void) { return graphics_get_memory_base(); } - -void graphics_soc_init(struct device *dev) -{ - intel_gma_init_igd_opregion(); - - /* - * GFX PEIM module inside FSP binary is taking care of graphics - * initialization based on RUN_FSP_GOP Kconfig - * option and input VBT file. Hence no need to load/execute legacy VGA - * OpROM in order to initialize GFX. - * - * In case of non-FSP solution, SoC need to select VGA_ROM_RUN - * Kconfig to perform GFX initialization through VGA OpRom. - */ - if (CONFIG(RUN_FSP_GOP)) - return; - - /* IGD needs to Bus Master */ - uint32_t reg32 = pci_read_config32(dev, PCI_COMMAND); - reg32 |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO; - pci_write_config32(dev, PCI_COMMAND, reg32); - - /* Initialize PCI device, load/execute BIOS Option ROM */ - pci_dev_init(dev); -} |