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authorNick Vaccaro <nvaccaro@google.com>2020-04-17 13:38:10 -0700
committerNick Vaccaro <nvaccaro@google.com>2020-04-28 20:49:44 +0000
commit029b5432a1a5db1b2c985eef5c01586c841cdda9 (patch)
tree526af41e84d0f96c708dbe0854bbd40d2422d3df /src/soc/intel/tigerlake
parentf0ebaf22600e60a84c313840f5718bb123a683e4 (diff)
downloadcoreboot-029b5432a1a5db1b2c985eef5c01586c841cdda9.tar.xz
soc/intel/tigerlake: fix call to print_spd_info()
Pointer passed to print_spd_info() from meminit.c needs to be dereferenced first, so this change dereferences it. BUG=b:154352883 TEST="emerge-volteer coreboot chromeos-bootimage", flash and boot volteer, login to kernel and execute the following cbmem command: localhost ~ # cbmem -c | grep LPDDR4X and verify it returns "SPD: module type is LPDDR4X" Change-Id: I5ff64121f0d50947c4946e9e02460dfb7319d01a Signed-off-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40496 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/soc/intel/tigerlake')
-rw-r--r--src/soc/intel/tigerlake/meminit.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/tigerlake/meminit.c b/src/soc/intel/tigerlake/meminit.c
index d44554af7e..ebadcffe84 100644
--- a/src/soc/intel/tigerlake/meminit.c
+++ b/src/soc/intel/tigerlake/meminit.c
@@ -230,7 +230,7 @@ static void read_md_spd(const struct spd_info *info, uintptr_t *data, size_t *le
die("Not a valid location(%d) for Memory-down SPD!\n", info->md_spd_loc);
}
- print_spd_info((unsigned char *)data);
+ print_spd_info((uint8_t *) *data);
}
void meminit_lpddr4x(FSP_M_CONFIG *mem_cfg, const struct lpddr4x_cfg *board_cfg,
@@ -317,7 +317,7 @@ static void read_sodimm_spd(const struct spd_info *info, struct spd_block *blk)
for (i = 0; i < ARRAY_SIZE(blk->addr_map); i++) {
if (blk->addr_map[i])
- print_spd_info((unsigned char *)blk->spd_array[i]);
+ print_spd_info((uint8_t *)blk->spd_array[i]);
}
}