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| author | Subrata Banik <subrata.banik@intel.com> | 2020-01-16 10:13:28 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2020-01-16 16:28:09 +0000 |
| commit | 2fff39151334bc5fbdc51d92a49b3f6a0d7766db (patch) | |
| tree | bc602587c91215191d8e2b0dcf7cba25df7ee5de /src/soc/intel/tigerlake | |
| parent | 937931ea04c27986312d261f0fbd2eff797615c7 (diff) | |
| download | coreboot-2fff39151334bc5fbdc51d92a49b3f6a0d7766db.tar.xz | |
soc/intel/{cnl,icl,skl, tgl}: Move SOC_INTEL_COMMON_BLOCK_THERMAL into SoC specific Kconfig
This patch moves common pch code SOC_INTEL_COMMON_BLOCK_THERMAL Kconfig selection
into SoC specific Kconfig selection as PCH thermal device is not available
with latest PCH (i.e. TGP and JSP).
Also added TODO for TGL thermal configuration as applicable.
TEST=Able to build and boot TGL RVP with this CL
Change-Id: Ibce17cc9f38fb666011ccd8f97bee63033ff5302
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38444
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/tigerlake')
| -rw-r--r-- | src/soc/intel/tigerlake/finalize.c | 9 |
1 files changed, 1 insertions, 8 deletions
diff --git a/src/soc/intel/tigerlake/finalize.c b/src/soc/intel/tigerlake/finalize.c index 2de58a9e70..aed5cc0e5e 100644 --- a/src/soc/intel/tigerlake/finalize.c +++ b/src/soc/intel/tigerlake/finalize.c @@ -68,14 +68,7 @@ static void pch_finalize(void) /* TCO Lock down */ tco_lockdown(); - /* - * Set low maximum temp threshold value used for dynamic thermal sensor - * shutdown consideration. - * - * If Dynamic Thermal Shutdown is enabled then PMC logic shuts down the - * thermal sensor when CPU is in a C-state and DTS Temp <= LTT. - */ - pch_thermal_configuration(); + /* TODO: Add Thermal Configuration */ /* * Disable ACPI PM timer based on dt policy |