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authorDuncan Laurie <dlaurie@google.com>2020-04-07 14:33:37 -0700
committerDuncan Laurie <dlaurie@chromium.org>2020-04-17 20:00:15 +0000
commit3ed55e5da1ea3ed49a20aa3983fc6ac1bc366fb5 (patch)
treef9711e19d7c3efda6d1a2f805b657d303ada28b8 /src/soc/intel/tigerlake
parent1e066117684997ff44af435854b885b6abf52c3f (diff)
downloadcoreboot-3ed55e5da1ea3ed49a20aa3983fc6ac1bc366fb5.tar.xz
soc/intel/tigerlake: Remove eMMC/SD support
Tigerlake platform does not have built in eMMC/SD support so all this code is unused and can be removed. Change-Id: I70ff983d175375171d5a649378f32f1062c0876d Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40372 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/tigerlake')
-rw-r--r--src/soc/intel/tigerlake/Makefile.inc1
-rw-r--r--src/soc/intel/tigerlake/chip.h9
-rw-r--r--src/soc/intel/tigerlake/include/soc/pcr_ids.h1
-rw-r--r--src/soc/intel/tigerlake/sd.c31
4 files changed, 0 insertions, 42 deletions
diff --git a/src/soc/intel/tigerlake/Makefile.inc b/src/soc/intel/tigerlake/Makefile.inc
index 4aa1f2f4d1..f62bfaf38c 100644
--- a/src/soc/intel/tigerlake/Makefile.inc
+++ b/src/soc/intel/tigerlake/Makefile.inc
@@ -43,7 +43,6 @@ ramstage-y += pmc.c
ramstage-y += reset.c
ramstage-y += smmrelocate.c
ramstage-y += systemagent.c
-ramstage-y += sd.c
ramstage-y += me.c
smm-y += gpio.c
diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h
index bc6c3db726..26eab4c8fd 100644
--- a/src/soc/intel/tigerlake/chip.h
+++ b/src/soc/intel/tigerlake/chip.h
@@ -127,12 +127,6 @@ struct soc_intel_tigerlake_config {
/* SMBus */
uint8_t SmbusEnable;
- /* eMMC and SD */
- uint8_t ScsEmmcHs400Enabled;
-
- /* Enable if SD Card Power Enable Signal is Active High */
- uint8_t SdCardPowerEnableActiveHigh;
-
/* Integrated Sensor */
uint8_t PchIshEnable;
@@ -210,9 +204,6 @@ struct soc_intel_tigerlake_config {
DEBUG_INTERFACE_TRACEHUB = (1 << 5),
} debug_interface_flag;
- /* GPIO SD card detect pin */
- unsigned int sdcard_cd_gpio;
-
/* Enable Pch iSCLK */
uint8_t pch_isclk;
diff --git a/src/soc/intel/tigerlake/include/soc/pcr_ids.h b/src/soc/intel/tigerlake/include/soc/pcr_ids.h
index 1d54805cb1..44884beb7a 100644
--- a/src/soc/intel/tigerlake/include/soc/pcr_ids.h
+++ b/src/soc/intel/tigerlake/include/soc/pcr_ids.h
@@ -12,7 +12,6 @@
/*
* Port ids
*/
-#define PID_EMMC 0x52
#define PID_SDX 0x53
#define PID_GPIOCOM0 0x6e
diff --git a/src/soc/intel/tigerlake/sd.c b/src/soc/intel/tigerlake/sd.c
deleted file mode 100644
index 857f175f98..0000000000
--- a/src/soc/intel/tigerlake/sd.c
+++ /dev/null
@@ -1,31 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
-
-/*
- * This file is created based on Intel Tiger Lake Processor PCH Datasheet
- * Document number: 575857
- * Chapter number: 26
- */
-
-#include <intelblocks/sd.h>
-#include <soc/soc_chip.h>
-
-int sd_fill_soc_gpio_info(struct acpi_gpio *gpio, struct device *dev)
-{
- config_t *config = config_of(dev);
-
- if (!config->sdcard_cd_gpio)
- return -1;
-
- gpio->type = ACPI_GPIO_TYPE_INTERRUPT;
- gpio->pull = ACPI_GPIO_PULL_NONE;
- gpio->irq.mode = ACPI_IRQ_EDGE_TRIGGERED;
- gpio->irq.polarity = ACPI_IRQ_ACTIVE_BOTH;
- gpio->irq.shared = ACPI_IRQ_SHARED;
- gpio->irq.wake = ACPI_IRQ_WAKE;
- gpio->interrupt_debounce_timeout = 10000; /* 100ms */
- gpio->pin_count = 1;
- gpio->pins[0] = config->sdcard_cd_gpio;
-
- return 0;
-}