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authorSridhar Siricilla <sridhar.siricilla@intel.com>2020-10-06 16:30:32 +0530
committerPatrick Georgi <pgeorgi@google.com>2020-10-19 06:47:30 +0000
commitd6ffbf0e43004d7458194d9641efd07569b800a7 (patch)
tree615efe340e58353cf939f01ef977317b1fc8fe42 /src/soc/intel/tigerlake
parentb9365ef377ff4fb7957dcb05e02c30f5817444f9 (diff)
downloadcoreboot-d6ffbf0e43004d7458194d9641efd07569b800a7.tar.xz
soc/intel/tigerlake: Reflow long lines
Use the 96 character limit. Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com> Change-Id: I43d77db1f81d72aa13f3a702abff490a68a52bd7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/46072 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/soc/intel/tigerlake')
-rw-r--r--src/soc/intel/tigerlake/meminit.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/src/soc/intel/tigerlake/meminit.c b/src/soc/intel/tigerlake/meminit.c
index 0c6f0b0f88..7e830f051f 100644
--- a/src/soc/intel/tigerlake/meminit.c
+++ b/src/soc/intel/tigerlake/meminit.c
@@ -441,12 +441,10 @@ void meminit_ddr(FSP_M_CONFIG *mem_cfg, const struct ddr_memory_cfg *board_cfg,
{
switch (board_cfg->mem_type) {
case MEMTYPE_DDR4:
- meminit_ddr4(mem_cfg, board_cfg->ddr4_cfg, info,
- half_populated);
+ meminit_ddr4(mem_cfg, board_cfg->ddr4_cfg, info, half_populated);
break;
case MEMTYPE_LPDDR4X:
- meminit_lpddr4x(mem_cfg, board_cfg->lpddr4_cfg, info,
- half_populated);
+ meminit_lpddr4x(mem_cfg, board_cfg->lpddr4_cfg, info, half_populated);
break;
default:
die("Unsupported memory type = %d!\n", board_cfg->mem_type);